1if ARCH_MVEBU 2 3config HAVE_MVEBU_EFUSE 4 bool 5 6config ARMADA_32BIT 7 bool 8 select BOARD_EARLY_INIT_F 9 select CPU_V7A 10 select SPL_DM if SPL 11 select SPL_DM_SEQ_ALIAS if SPL 12 select SPL_OF_CONTROL if SPL 13 select SPL_SKIP_LOWLEVEL_INIT if SPL 14 select SPL_SIMPLE_BUS if SPL 15 select SUPPORT_SPL 16 select SYS_L2_PL310 if !SYS_L2CACHE_OFF 17 select TRANSLATION_OFFSET 18 select TOOLS_KWBIMAGE if SPL 19 select SPL_SYS_NO_VECTOR_TABLE if SPL 20 select ARCH_VERY_EARLY_INIT 21 select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU 22 select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET 23 24# ARMv7 SoCs... 25config ARMADA_375 26 bool 27 select ARMADA_32BIT 28 29config ARMADA_38X 30 bool 31 select ARMADA_32BIT 32 select HAVE_MVEBU_EFUSE 33 34config ARMADA_38X_HS_IMPEDANCE_THRESH 35 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)" 36 depends on ARMADA_38X 37 default 0x6 38 range 0x0 0x7 39 40config ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING 41 bool 42 depends on ARMADA_38X 43 44config ARMADA_XP 45 bool 46 select ARMADA_32BIT 47 48# ARMv8 SoCs... 49config ARMADA_3700 50 bool 51 select ARM64 52 select HAVE_MVEBU_EFUSE 53 54# Armada 7K and 8K are very similar - use only one Kconfig symbol for both 55config ARMADA_8K 56 bool 57 select ARM64 58 59config ALLEYCAT_5 60 bool 61 select ARM64 62 63# Armada PLL frequency (used for NAND clock generation) 64config SYS_MVEBU_PLL_CLOCK 65 int 66 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS 67 default "1000000000" if ARMADA_38X || ARMADA_375 68 69# Armada XP/38x SoC types... 70config MV78230 71 bool 72 select ARMADA_XP 73 74config MV78260 75 bool 76 select ARMADA_XP 77 imply CMD_SATA 78 79config MV78460 80 bool 81 select ARMADA_XP 82 83config ARMADA_MSYS 84 bool 85 select ARMADA_32BIT 86 87config 98DX4251 88 bool 89 select ARMADA_MSYS 90 91config 98DX3336 92 bool 93 select ARMADA_MSYS 94 95config 98DX3236 96 bool 97 select ARMADA_MSYS 98 99config 88F6820 100 bool 101 select ARMADA_38X 102 103config CUSTOMER_BOARD_SUPPORT 104 bool 105 106config DDR4 107 bool "Support Marvell DDR4 Training driver" 108 109choice 110 prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select" 111 optional 112 113config TARGET_CLEARFOG 114 bool "Support ClearFog" 115 select 88F6820 116 select BOARD_LATE_INIT 117 select OF_BOARD_SETUP 118 119config TARGET_HELIOS4 120 bool "Support Helios4" 121 select 88F6820 122 123config TARGET_MVEBU_ARMADA_37XX 124 bool "Support Armada 37xx platforms" 125 select ARMADA_3700 126 imply SCSI 127 128config TARGET_DB_88F6720 129 bool "Support DB-88F6720 Armada 375" 130 select ARMADA_375 131 132config TARGET_DB_88F6820_GP 133 bool "Support DB-88F6820-GP" 134 select 88F6820 135 136config TARGET_DB_88F6820_AMC 137 bool "Support DB-88F6820-AMC" 138 select 88F6820 139 140config TARGET_TURRIS_OMNIA 141 bool "Support Turris Omnia" 142 select 88F6820 143 select BOARD_LATE_INIT 144 select DM_I2C 145 select I2C_MUX 146 select I2C_MUX_PCA954x 147 select SPL_DRIVERS_MISC 148 select SPL_I2C_MUX 149 select SPL_SYS_MALLOC_SIMPLE 150 select SYS_I2C_MVTWSI 151 select ATSHA204A 152 select I2C_EEPROM 153 select ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING 154 155config TARGET_TURRIS_MOX 156 bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe" 157 select ARMADA_3700 158 select BOARD_TYPES 159 select ENV_IS_IN_MMC 160 select ENV_IS_IN_SPI_FLASH 161 select MULTI_DTB_FIT 162 163config TARGET_MVEBU_ARMADA_8K 164 bool "Support Armada 7k/8k platforms" 165 select ARMADA_8K 166 select BOARD_LATE_INIT 167 imply SCSI 168 169config TARGET_MVEBU_ALLEYCAT5 170 bool "Support AlleyCat 5 platforms" 171 select ALLEYCAT_5 172 173config TARGET_OCTEONTX2_CN913x 174 bool "Support CN913x platforms" 175 select ARMADA_8K 176 imply BOARD_EARLY_INIT_R 177 select BOARD_LATE_INIT 178 imply SCSI 179 180config TARGET_DB_MV784MP_GP 181 bool "Support db-mv784mp-gp" 182 select BOARD_ECC_SUPPORT 183 select MV78460 184 185config TARGET_DS116 186 bool "Support Synology DS116" 187 select 88F6820 188 189config TARGET_DS414 190 bool "Support Synology DS414" 191 select MV78230 192 193config TARGET_MAXBCM 194 bool "Support maxbcm" 195 select BOARD_ECC_SUPPORT 196 select MV78460 197 198config TARGET_N2350 199 bool "Support Thecus N2350" 200 select 88F6820 201 select DDR4 202 203config TARGET_THEADORABLE 204 bool "Support theadorable Armada XP" 205 select BOARD_LATE_INIT if USB 206 select MV78260 207 imply CMD_SATA 208 209config TARGET_CONTROLCENTERDC 210 bool "Support CONTROLCENTERDC" 211 select 88F6820 212 select CUSTOMER_BOARD_SUPPORT 213 214config TARGET_X530 215 bool "Support Allied Telesis x530" 216 select 88F6820 217 218config TARGET_X250 219 bool "Support Allied Telesis x250" 220 select ARMADA_8K 221 imply SCSI 222 imply BOOTSTD_DEFAULTS 223 224config TARGET_X240 225 bool "Support Allied Telesis x240" 226 select ALLEYCAT_5 227 imply BOOTSTD_DEFAULTS 228 229config TARGET_DB_XC3_24G4XG 230 bool "Support DB-XC3-24G4XG" 231 select 98DX3336 232 233config TARGET_CRS3XX_98DX3236 234 bool "Support CRS3XX-98DX3236" 235 select 98DX3236 236 237endchoice 238 239choice 240 prompt "DDR bus width" 241 default DDR_64BIT 242 depends on ARMADA_XP 243 244config DDR_64BIT 245 bool "64bit bus width" 246 247config DDR_32BIT 248 bool "32bit bus width" 249 250endchoice 251 252config DDR_LOG_LEVEL 253 int "DDR training code log level" 254 depends on ARMADA_XP 255 default 0 256 range 0 3 257 help 258 Amount of information provided on error while running the DDR 259 training code. At level 0, provides an error code in a case of 260 failure, RL, WL errors and other algorithm failure. At level 1, 261 provides the D-Unit setup (SPD/Static configuration). At level 2, 262 provides the windows margin as a results of DQS centeralization. 263 At level 3, provides the windows margin of each DQ as a results of 264 DQS centeralization. 265 266config DDR_IMMUTABLE_DEBUG_SETTINGS 267 bool "Immutable DDR debug level (always DEBUG_LEVEL_ERROR)" 268 depends on ARMADA_38X 269 help 270 Makes the DDR training code debug level settings immutable. 271 The debug level setting from board topology definition is ignored. 272 The debug level is always set to DEBUG_LEVEL_ERROR and register 273 dumps are disabled. 274 This can save around 10 KiB of space in SPL binary. 275 276config DDR_RESET_ON_TRAINING_FAILURE 277 bool "Reset the board on DDR training failure instead of hanging" 278 depends on ARMADA_38X || ARMADA_XP 279 help 280 If DDR training fails in SPL, reset the board instead of hanging. 281 Some boards are known to fail DDR training occasionally and an 282 immediate reset may be preferable to waiting until the board is 283 reset by watchdog (if there even is one). 284 285 Note that if booting via UART and the DDR training fails, the 286 device will still hang - it doesn't make sense to reset the board 287 in such a case. 288 289config BOARD_ECC_SUPPORT 290 bool 291 292config SYS_BOARD 293 default "clearfog" if TARGET_CLEARFOG 294 default "helios4" if TARGET_HELIOS4 295 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX 296 default "db-88f6720" if TARGET_DB_88F6720 297 default "db-88f6820-gp" if TARGET_DB_88F6820_GP 298 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC 299 default "turris_omnia" if TARGET_TURRIS_OMNIA 300 default "turris_mox" if TARGET_TURRIS_MOX 301 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K 302 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x 303 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP 304 default "ds116" if TARGET_DS116 305 default "ds414" if TARGET_DS414 306 default "maxbcm" if TARGET_MAXBCM 307 default "n2350" if TARGET_N2350 308 default "theadorable" if TARGET_THEADORABLE 309 default "a38x" if TARGET_CONTROLCENTERDC 310 default "x530" if TARGET_X530 311 default "x250" if TARGET_X250 312 default "x240" if TARGET_X240 313 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG 314 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236 315 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5 316 317config SYS_CONFIG_NAME 318 default "clearfog" if TARGET_CLEARFOG 319 default "helios4" if TARGET_HELIOS4 320 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX 321 default "db-88f6720" if TARGET_DB_88F6720 322 default "db-88f6820-gp" if TARGET_DB_88F6820_GP 323 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC 324 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K 325 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x 326 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP 327 default "ds116" if TARGET_DS116 328 default "ds414" if TARGET_DS414 329 default "maxbcm" if TARGET_MAXBCM 330 default "n2350" if TARGET_N2350 331 default "theadorable" if TARGET_THEADORABLE 332 default "turris_omnia" if TARGET_TURRIS_OMNIA 333 default "turris_mox" if TARGET_TURRIS_MOX 334 default "controlcenterdc" if TARGET_CONTROLCENTERDC 335 default "x530" if TARGET_X530 336 default "x250" if TARGET_X250 337 default "x240" if TARGET_X240 338 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG 339 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236 340 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5 341 342config SYS_VENDOR 343 default "Marvell" if TARGET_DB_MV784MP_GP 344 default "Marvell" if TARGET_MVEBU_ARMADA_37XX 345 default "Marvell" if TARGET_DB_88F6720 346 default "Marvell" if TARGET_DB_88F6820_GP 347 default "Marvell" if TARGET_DB_88F6820_AMC 348 default "Marvell" if TARGET_MVEBU_ARMADA_8K 349 default "Marvell" if TARGET_OCTEONTX2_CN913x 350 default "Marvell" if TARGET_DB_XC3_24G4XG 351 default "Marvell" if TARGET_MVEBU_DB_88F7040 352 default "solidrun" if TARGET_CLEARFOG 353 default "kobol" if TARGET_HELIOS4 354 default "Synology" if TARGET_DS116 355 default "Synology" if TARGET_DS414 356 default "thecus" if TARGET_N2350 357 default "CZ.NIC" if TARGET_TURRIS_OMNIA 358 default "CZ.NIC" if TARGET_TURRIS_MOX 359 default "gdsys" if TARGET_CONTROLCENTERDC 360 default "alliedtelesis" if TARGET_X530 361 default "alliedtelesis" if TARGET_X250 362 default "alliedtelesis" if TARGET_X240 363 default "mikrotik" if TARGET_CRS3XX_98DX3236 364 default "Marvell" if TARGET_MVEBU_ALLEYCAT5 365 366config SYS_SOC 367 default "mvebu" 368 369choice 370 prompt "Boot method" 371 depends on SPL 372 373config MVEBU_SPL_BOOT_DEVICE_SPI 374 bool "NOR flash (SPI or parallel)" 375 imply ENV_IS_IN_SPI_FLASH 376 imply SPL_DM_SPI 377 imply SPL_SPI_FLASH_SUPPORT 378 imply SPL_SPI_LOAD 379 imply SPL_SPI 380 select SPL_BOOTROM_SUPPORT 381 382config MVEBU_SPL_BOOT_DEVICE_NAND 383 bool "NAND flash (SPI or parallel)" 384 select MTD_RAW_NAND 385 select SPL_BOOTROM_SUPPORT 386 387config MVEBU_SPL_BOOT_DEVICE_MMC 388 bool "eMMC or SD card" 389 imply ENV_IS_IN_MMC 390 # GPIO needed for eMMC/SD card presence detection 391 imply SPL_DM_GPIO 392 imply SPL_DM_MMC 393 imply SPL_GPIO 394 imply SPL_LIBDISK_SUPPORT 395 imply SPL_MMC 396 select SUPPORT_EMMC_BOOT if SPL_MMC 397 select SPL_BOOTROM_SUPPORT 398 399config MVEBU_SPL_BOOT_DEVICE_SATA 400 bool "SATA" 401 imply SPL_SATA 402 imply SPL_LIBDISK_SUPPORT 403 select SPL_BOOTROM_SUPPORT 404 405config MVEBU_SPL_BOOT_DEVICE_PEX 406 bool "PCI Express" 407 select SPL_BOOTROM_SUPPORT 408 409config MVEBU_SPL_BOOT_DEVICE_UART 410 bool "UART" 411 select SPL_BOOTROM_SUPPORT 412 413endchoice 414 415config MVEBU_SPL_NAND_BADBLK_LOCATION 416 hex "NAND Bad block indicator location" 417 depends on MVEBU_SPL_BOOT_DEVICE_NAND 418 range 0x0 0x1 419 help 420 Value 0x0 = SLC flash = BBI at page 0 or page 1 421 Value 0x1 = MLC flash = BBI at last page in the block 422 423config MVEBU_SPL_SATA_BLKSZ 424 int "SATA block size" 425 depends on MVEBU_SPL_BOOT_DEVICE_SATA 426 range 512 32768 427 default 512 428 help 429 Block size of the SATA disk in bytes. 430 Typically 512 bytes for majority of disks 431 and 4096 bytes for 4K Native disks. 432 433config MVEBU_EFUSE 434 bool "Enable eFuse support" 435 depends on HAVE_MVEBU_EFUSE 436 help 437 Enable support for reading and writing eFuses on mvebu SoCs. 438 439config MVEBU_EFUSE_FAKE 440 bool "Fake eFuse access (dry run)" 441 depends on MVEBU_EFUSE 442 help 443 This enables a "dry run" mode where eFuses are not really programmed. 444 Instead the eFuse accesses are emulated by writing to and reading 445 from a memory block. 446 This is can be used for testing prog scripts. 447 448config MVEBU_EFUSE_VHV_GPIO 449 string "VHV_Enable GPIO name for eFuse programming" 450 depends on MVEBU_EFUSE && !ARMADA_3700 451 help 452 The eFuse programming (burning) phase requires supplying 1.8V to the 453 device on the VHV power pin, while for normal operation the VHV power 454 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power 455 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details. 456 . 457 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power. 458 459config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW 460 bool "VHV_Enable GPIO is Active Low" 461 depends on MVEBU_EFUSE_VHV_GPIO != "" 462 463config SECURED_MODE_IMAGE 464 bool "Build image for trusted boot" 465 default false 466 depends on 88F6820 467 help 468 Build an image that employs the ARMADA SoC's trusted boot framework 469 for securely booting images. 470 471config SECURED_MODE_CSK_INDEX 472 int "Index of active CSK" 473 default 0 474 depends on SECURED_MODE_IMAGE 475 476config SF_DEFAULT_SPEED 477 int "Default speed for SPI flash in Hz" 478 default 10000000 479 depends on MVEBU_SPL_BOOT_DEVICE_SPI 480 481config SF_DEFAULT_MODE 482 hex "Default mode for SPI flash" 483 default 0x0 484 depends on MVEBU_SPL_BOOT_DEVICE_SPI 485 486config ARMADA_32BIT_SYSCON 487 bool 488 depends on ARMADA_32BIT 489 select REGMAP 490 select SYSCON 491 492config ARMADA_32BIT_SYSCON_RESET 493 bool "Support Armada XP/375/38x/39x reset controller" 494 depends on ARMADA_32BIT 495 depends on DM_RESET 496 select ARMADA_32BIT_SYSCON 497 help 498 Build support for Armada XP/375/38x/39x reset controller. This is 499 needed for PCIe support. 500 501config ARMADA_32BIT_SYSCON_SYSRESET 502 bool "Support Armada XP/375/38x/39x sysreset via driver model" 503 depends on ARMADA_32BIT 504 depends on SYSRESET 505 select ARMADA_32BIT_SYSCON 506 help 507 Build support for Armada XP/375/38x/39x system reset via driver model. 508 509source "board/solidrun/clearfog/Kconfig" 510source "board/kobol/helios4/Kconfig" 511 512endif 513