1menu "ARM architecture" 2 depends on ARM 3 4config SYS_ARCH 5 default "arm" 6 7config ARM64 8 bool 9 select 64BIT 10 select SPL_64BIT if SPL 11 select PHYS_64BIT 12 select SYS_CACHE_SHIFT_6 13 imply SPL_SEPARATE_BSS 14 15config ARM64_CRC32 16 bool "Enable support for CRC32 instruction" 17 depends on ARM64 && CC_IS_GCC 18 default y 19 help 20 ARMv8 implements dedicated crc32 instruction for crc32 calculation. 21 This is faster than software crc32 calculation. This instruction may 22 not be present on all ARMv8.0, but is always present on ARMv8.1 and 23 newer. 24 25config COUNTER_FREQUENCY 26 int "Timer clock frequency" 27 depends on ARM64 || CPU_V7A 28 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL 29 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \ 30 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036 31 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A 32 default 100000000 if ARCH_ZYNQMP 33 default 200000000 if TARGET_SOCFPGA_AGILEX5 || TARGET_SOCFPGA_AGILEX7M 34 default 0 35 help 36 For platforms with ARMv8-A and ARMv7-A which features a system 37 counter, those platforms needs software to program the counter 38 frequency. Setup time clock frequency for certain platform. 39 0 means no need to configure the system counter frequency. 40 For platforms needs the frequency set in U-Boot with a 41 pre-defined value, should have the macro defined as a non-zero value. 42 43config POSITION_INDEPENDENT 44 bool "Generate position-independent pre-relocation code" 45 depends on ARM64 || CPU_V7A 46 help 47 U-Boot expects to be linked to a specific hard-coded address, and to 48 be loaded to and run from that address. This option lifts that 49 restriction, thus allowing the code to be loaded to and executed from 50 almost any 4K aligned address. This logic relies on the relocation 51 information that is embedded in the binary to support U-Boot 52 relocating itself to the top-of-RAM later during execution. 53 54config INIT_SP_RELATIVE 55 bool "Specify the early stack pointer relative to the .bss section" 56 depends on ARM64 57 default n if ARCH_QEMU 58 default y if POSITION_INDEPENDENT 59 help 60 U-Boot typically uses a hard-coded value for the stack pointer 61 before relocation. Enable this option to instead calculate the 62 initial SP at run-time. This is useful to avoid hard-coding addresses 63 into U-Boot, so that it can be loaded and executed at arbitrary 64 addresses and thus avoid using arbitrary addresses at runtime. 65 66 If this option is enabled, the early stack pointer is set to 67 &_bss_start with a offset value added. The offset is specified by 68 SYS_INIT_SP_BSS_OFFSET. 69 70config SYS_INIT_SP_BSS_OFFSET 71 int "Early stack offset from the .bss base address" 72 depends on ARM64 73 depends on INIT_SP_RELATIVE 74 default 524288 75 help 76 This option's value is the offset added to &_bss_start in order to 77 calculate the stack pointer. This offset should be large enough so 78 that the early malloc region, global data (gd), and early stack usage 79 do not overlap any appended DTB. 80 81config SPL_SYS_NO_VECTOR_TABLE 82 depends on SPL 83 bool 84 85config SPL_USE_SEPARATE_FAULT_HANDLERS 86 bool "Use separate fault handlers instead of a single common one" 87 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M 88 help 89 Instead of a common fault handler, generate a separate one for 90 undefined_instruction, software_interrupt, prefetch_abort etc. 91 This is for debugging purposes, when you want to set breakpoints 92 on them separately. 93 94config LINUX_KERNEL_IMAGE_HEADER 95 depends on ARM64 96 bool 97 help 98 Place a Linux kernel image header at the start of the U-Boot binary. 99 The format of the header is described in the Linux kernel source at 100 Documentation/arm64/booting.txt. This feature is useful since the 101 image header reports the amount of memory (BSS and similar) that 102 U-Boot needs to use, but which isn't part of the binary. 103 104config LNX_KRNL_IMG_TEXT_OFFSET_BASE 105 depends on LINUX_KERNEL_IMAGE_HEADER 106 hex 107 help 108 The value subtracted from CONFIG_TEXT_BASE to calculate the 109 TEXT_OFFSET value written to the Linux kernel image header. 110 111config KVM_VIRT_INS 112 bool "Emit virtualizable instructions" 113 help 114 Instructions in the ARM ISA that have multiple output registers, 115 can't be used if the instruction leads to an exception to the hypervisor. 116 These instructions cannot be emulated by KVM because they do not produce 117 syndrome information data that KVM can use to infer the destination 118 register, the faulting address, whether it was a load or store, 119 if it's a 32 or 64 bit general-purpose register amongst other things. 120 Use this to produce virtualizable instructions if you plan to run U-Boot 121 with KVM. 122 123config NVIC 124 bool 125 126config GICV2 127 bool 128 129config GICV3 130 bool 131 132config DRIVER_GICV2 133 bool "ARM GICV2 driver" 134 select IRQ 135 depends on !NVIC 136 help 137 ARM GICV2 driver. 138 Basic support for parsing the GICV2 node and generate ACPI tables. 139 140config GIC_V3_ITS 141 bool "ARM GICV3 ITS" 142 select IRQ 143 depends on !NVIC 144 help 145 ARM GICV3 Interrupt translation service (ITS). 146 Basic support for programming locality specific peripheral 147 interrupts (LPI) configuration tables and enable LPI tables. 148 LPI configuration table can be used by u-boot or Linux. 149 ARM GICV3 has limitation, once the LPI table is enabled, LPI 150 configuration table can not be re-programmed, unless GICV3 reset. 151 152config GICV3_SUPPORT_GIC600 153 bool "ARM GICV3 GIC600 SUPPORT" 154 depends on !NVIC 155 help 156 ARM GIC-600 IP complies with ARM GICv3 architecture, but among others, 157 implements a power control register in the Redistributor frame.This 158 register must be programmed to mark the frame as powered on, before 159 accessing other registers in the frame. Rest of initialization sequence 160 remains the same. 161 162config STATIC_RELA 163 bool 164 default y if ARM64 165 166config DMA_ADDR_T_64BIT 167 bool 168 default y if ARM64 169 170config HAS_VBAR 171 bool 172 173config HAS_THUMB2 174 bool 175 176config GPIO_EXTRA_HEADER 177 bool 178 179# Used for compatibility with asm files copied from the kernel 180config ARM_ASM_UNIFIED 181 bool 182 default y 183 184# Used for compatibility with asm files copied from the kernel 185config THUMB2_KERNEL 186 bool 187 188config SYS_ICACHE_OFF 189 bool "Do not enable icache" 190 help 191 Do not enable instruction cache in U-Boot. 192 193config SPL_SYS_ICACHE_OFF 194 bool "Do not enable icache in SPL" 195 depends on SPL 196 default SYS_ICACHE_OFF 197 help 198 Do not enable instruction cache in SPL. 199 200config SYS_DCACHE_OFF 201 bool "Do not enable dcache" 202 help 203 Do not enable data cache in U-Boot. 204 205config SPL_SYS_DCACHE_OFF 206 bool "Do not enable dcache in SPL" 207 depends on SPL 208 default SYS_DCACHE_OFF 209 help 210 Do not enable data cache in SPL. 211 212config SYS_ARM_CACHE_CP15 213 bool "CP15 based cache enabling support" 214 depends on !CPU_V7M 215 help 216 Select this if your processor suports enabling caches by using 217 CP15 registers. 218 219config SYS_ARM_MMU 220 bool "MMU-based Paged Memory Management Support" 221 select SYS_ARM_CACHE_CP15 222 depends on !CPU_V7M 223 help 224 Select if you want MMU-based virtualised addressing space 225 support via paged memory management. 226 227config SYS_ARM_MPU 228 bool 'Use the ARM v7 PMSA Compliant MPU' 229 help 230 Some ARM systems without an MMU have instead a Memory Protection 231 Unit (MPU) that defines the type and permissions for regions of 232 memory. 233 If your CPU has an MPU then you should choose 'y' here unless you 234 know that you do not want to use the MPU. 235 236# If set, the workarounds for these ARM errata are applied early during U-Boot 237# startup. Note that in general these options force the workarounds to be 238# applied; no CPU-type/version detection exists, unlike the similar options in 239# the Linux kernel. Do not set these options unless they apply! Also note that 240# the following can be machine-specific errata. These do have ability to 241# provide rudimentary version and machine-specific checks, but expect no 242# product checks: 243# CONFIG_ARM_ERRATA_430973 244# CONFIG_ARM_ERRATA_454179 245# CONFIG_ARM_ERRATA_621766 246# CONFIG_ARM_ERRATA_798870 247# CONFIG_ARM_ERRATA_801819 248# CONFIG_ARM_CORTEX_A8_CVE_2017_5715 249# CONFIG_ARM_CORTEX_A15_CVE_2017_5715 250 251config ARM_ERRATA_430973 252 bool 253 254config ARM_ERRATA_454179 255 bool 256 257config ARM_ERRATA_621766 258 bool 259 260config ARM_ERRATA_716044 261 bool 262 263config ARM_ERRATA_725233 264 bool 265 266config ARM_ERRATA_742230 267 bool 268 269config ARM_ERRATA_743622 270 bool 271 272config ARM_ERRATA_751472 273 bool 274 275config ARM_ERRATA_761320 276 bool 277 278config ARM_ERRATA_773022 279 bool 280 281config ARM_ERRATA_774769 282 bool 283 284config ARM_ERRATA_794072 285 bool 286 287config ARM_ERRATA_798870 288 bool 289 290config ARM_ERRATA_801819 291 bool 292 293config ARM_ERRATA_826974 294 bool 295 296config ARM_ERRATA_828024 297 bool 298 299config ARM_ERRATA_829520 300 bool 301 302config ARM_ERRATA_833069 303 bool 304 305config ARM_ERRATA_833471 306 bool 307 308config ARM_ERRATA_845369 309 bool 310 311config ARM_ERRATA_852421 312 bool 313 314config ARM_ERRATA_852423 315 bool 316 317config ARM_ERRATA_855873 318 bool 319 320config ARM_CORTEX_A8_CVE_2017_5715 321 bool 322 323config ARM_CORTEX_A15_CVE_2017_5715 324 bool 325 326config CPU_ARM720T 327 bool 328 select SYS_CACHE_SHIFT_5 329 imply SYS_ARM_MMU 330 331config CPU_ARM920T 332 bool 333 select SYS_CACHE_SHIFT_5 334 imply SYS_ARM_MMU 335 336config CPU_ARM926EJS 337 bool 338 select SYS_CACHE_SHIFT_5 339 imply SYS_ARM_MMU 340 imply SPL_SEPARATE_BSS 341 342config CPU_ARM946ES 343 bool 344 select SYS_CACHE_SHIFT_5 345 imply SYS_ARM_MMU 346 347config CPU_ARM1136 348 bool 349 select SYS_CACHE_SHIFT_5 350 imply SYS_ARM_MMU 351 imply SPL_SEPARATE_BSS 352 353config CPU_ARM1176 354 bool 355 select HAS_VBAR 356 select SYS_CACHE_SHIFT_5 357 imply SYS_ARM_MMU 358 359config CPU_V7A 360 bool 361 select HAS_THUMB2 362 select HAS_VBAR 363 select SYS_CACHE_SHIFT_6 364 imply SYS_ARM_MMU 365 366config CPU_V7M 367 bool 368 select HAS_THUMB2 369 select SYS_ARM_MPU 370 select SYS_CACHE_SHIFT_5 371 select SYS_THUMB_BUILD 372 select THUMB2_KERNEL 373 select NVIC 374 375config CPU_V7R 376 bool 377 select HAS_THUMB2 378 select SYS_ARM_CACHE_CP15 379 select SYS_ARM_MPU 380 select SYS_CACHE_SHIFT_6 381 382config SYS_CPU 383 default "arm720t" if CPU_ARM720T 384 default "arm920t" if CPU_ARM920T 385 default "arm926ejs" if CPU_ARM926EJS 386 default "arm946es" if CPU_ARM946ES 387 default "arm1136" if CPU_ARM1136 388 default "arm1176" if CPU_ARM1176 389 default "armv7" if CPU_V7A 390 default "armv7" if CPU_V7R 391 default "armv7m" if CPU_V7M 392 default "armv8" if ARM64 393 394config SYS_ARM_ARCH 395 int 396 default 4 if CPU_ARM720T 397 default 4 if CPU_ARM920T 398 default 5 if CPU_ARM926EJS 399 default 5 if CPU_ARM946ES 400 default 6 if CPU_ARM1136 401 default 6 if CPU_ARM1176 402 default 7 if CPU_V7A 403 default 7 if CPU_V7M 404 default 7 if CPU_V7R 405 default 8 if ARM64 406 407choice 408 prompt "Select the ARM data write cache policy" 409 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1 410 default SYS_ARM_CACHE_WRITEBACK 411 412config SYS_ARM_CACHE_WRITEBACK 413 bool "Write-back (WB)" 414 help 415 A write updates the cache only and marks the cache line as dirty. 416 External memory is updated only when the line is evicted or explicitly 417 cleaned. 418 419config SYS_ARM_CACHE_WRITETHROUGH 420 bool "Write-through (WT)" 421 help 422 A write updates both the cache and the external memory system. 423 This does not mark the cache line as dirty. 424 425config SYS_ARM_CACHE_WRITEALLOC 426 bool "Write allocation (WA)" 427 help 428 A cache line is allocated on a write miss. This means that executing a 429 store instruction on the processor might cause a burst read to occur. 430 There is a linefill to obtain the data for the cache line, before the 431 write is performed. 432endchoice 433 434config ARCH_VERY_EARLY_INIT 435 bool 436 437config SPL_ARCH_VERY_EARLY_INIT 438 bool 439 440config ARCH_CPU_INIT 441 bool "Enable ARCH_CPU_INIT" 442 help 443 Some architectures require a call to arch_cpu_init(). 444 Say Y here to enable it 445 446config SYS_ARCH_TIMER 447 bool "ARM Generic Timer support" 448 depends on CPU_V7A || ARM64 449 default y if ARM64 450 help 451 The ARM Generic Timer (aka arch-timer) provides an architected 452 interface to a timer source on an SoC. 453 It is mandatory for ARMv8 implementation and widely available 454 on ARMv7 systems. 455 456config ARM_SMCCC 457 bool "Support for ARM SMC Calling Convention (SMCCC)" 458 depends on CPU_V7A || ARM64 459 select ARM_PSCI_FW 460 help 461 Say Y here if you want to enable ARM SMC Calling Convention. 462 This should be enabled if U-Boot needs to communicate with system 463 firmware (for example, PSCI) according to SMCCC. 464 465config SYS_THUMB_BUILD 466 bool "Build U-Boot using the Thumb instruction set" 467 depends on !ARM64 468 help 469 Use this flag to build U-Boot using the Thumb instruction set for 470 ARM architectures. Thumb instruction set provides better code 471 density. For ARM architectures that support Thumb2 this flag will 472 result in Thumb2 code generated by GCC. 473 474config SPL_SYS_THUMB_BUILD 475 bool "Build SPL using the Thumb instruction set" 476 default y if SYS_THUMB_BUILD 477 depends on !ARM64 && SPL 478 help 479 Use this flag to build SPL using the Thumb instruction set for 480 ARM architectures. Thumb instruction set provides better code 481 density. For ARM architectures that support Thumb2 this flag will 482 result in Thumb2 code generated by GCC. 483 484config TPL_SYS_THUMB_BUILD 485 bool "Build TPL using the Thumb instruction set" 486 default y if SYS_THUMB_BUILD 487 depends on TPL && !ARM64 488 help 489 Use this flag to build TPL using the Thumb instruction set for 490 ARM architectures. Thumb instruction set provides better code 491 density. For ARM architectures that support Thumb2 this flag will 492 result in Thumb2 code generated by GCC. 493 494config SYS_L2_PL310 495 bool "ARM PL310 L2 cache controller" 496 help 497 Enable support for ARM PL310 L2 cache controller in U-Boot 498 499config SPL_SYS_L2_PL310 500 bool "ARM PL310 L2 cache controller in SPL" 501 help 502 Enable support for ARM PL310 L2 cache controller in SPL 503 504config SYS_L2CACHE_OFF 505 bool "L2cache off" 506 help 507 If SoC does not support L2CACHE or one does not want to enable 508 L2CACHE, choose this option. 509 510config ENABLE_ARM_SOC_BOOT0_HOOK 511 bool "prepare BOOT0 header" 512 help 513 If the SoC's BOOT0 requires a header area filled with (magic) 514 values, then choose this option, and create a file included as 515 <asm/arch/boot0.h> which contains the required assembler code. 516 517config USE_ARCH_MEMCPY 518 bool "Use an assembly optimized implementation of memcpy" 519 default y if !ARM64 520 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 521 help 522 Enable the generation of an optimized version of memcpy. 523 Such an implementation may be faster under some conditions 524 but may increase the binary size. 525 526config SPL_USE_ARCH_MEMCPY 527 bool "Use an assembly optimized implementation of memcpy for SPL" 528 default y if USE_ARCH_MEMCPY 529 depends on SPL 530 help 531 Enable the generation of an optimized version of memcpy. 532 Such an implementation may be faster under some conditions 533 but may increase the binary size. 534 535config TPL_USE_ARCH_MEMCPY 536 bool "Use an assembly optimized implementation of memcpy for TPL" 537 default y if USE_ARCH_MEMCPY 538 depends on TPL 539 help 540 Enable the generation of an optimized version of memcpy. 541 Such an implementation may be faster under some conditions 542 but may increase the binary size. 543 544config USE_ARCH_MEMMOVE 545 bool "Use an assembly optimized implementation of memmove" if !ARM64 546 default USE_ARCH_MEMCPY if ARM64 547 depends on ARM64 548 help 549 Enable the generation of an optimized version of memmove. 550 Such an implementation may be faster under some conditions 551 but may increase the binary size. 552 553config SPL_USE_ARCH_MEMMOVE 554 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64 555 default SPL_USE_ARCH_MEMCPY if ARM64 556 depends on SPL && ARM64 557 help 558 Enable the generation of an optimized version of memmove. 559 Such an implementation may be faster under some conditions 560 but may increase the binary size. 561 562config TPL_USE_ARCH_MEMMOVE 563 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64 564 default TPL_USE_ARCH_MEMCPY if ARM64 565 depends on TPL && ARM64 566 help 567 Enable the generation of an optimized version of memmove. 568 Such an implementation may be faster under some conditions 569 but may increase the binary size. 570 571config USE_ARCH_MEMSET 572 bool "Use an assembly optimized implementation of memset" 573 default y if !ARM64 574 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 575 help 576 Enable the generation of an optimized version of memset. 577 Such an implementation may be faster under some conditions 578 but may increase the binary size. 579 580config SPL_USE_ARCH_MEMSET 581 bool "Use an assembly optimized implementation of memset for SPL" 582 default y if USE_ARCH_MEMSET 583 depends on SPL 584 help 585 Enable the generation of an optimized version of memset. 586 Such an implementation may be faster under some conditions 587 but may increase the binary size. 588 589config TPL_USE_ARCH_MEMSET 590 bool "Use an assembly optimized implementation of memset for TPL" 591 default y if USE_ARCH_MEMSET 592 depends on TPL 593 help 594 Enable the generation of an optimized version of memset. 595 Such an implementation may be faster under some conditions 596 but may increase the binary size. 597 598config ARM64_SUPPORT_AARCH32 599 bool "ARM64 system support AArch32 execution state" 600 depends on ARM64 601 default y if !TARGET_THUNDERX_88XX 602 help 603 This ARM64 system supports AArch32 execution state. 604 605config IPROC 606 bool 607 608config S5P 609 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX 610 611choice 612 prompt "Target select" 613 default TARGET_HIKEY 614 615config ARCH_AIROHA 616 bool "Airoha SoCs" 617 select DM 618 select OF_CONTROL 619 help 620 Support for the Airoha soc. 621 622config ARCH_AT91 623 bool "Atmel AT91" 624 select GPIO_EXTRA_HEADER 625 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB 626 select SPL_SEPARATE_BSS if SPL 627 imply SYS_THUMB_BUILD 628 629config ARCH_DAVINCI 630 bool "TI DaVinci" 631 select CPU_ARM926EJS 632 select GPIO_EXTRA_HEADER 633 select SPL_DM_SPI if SPL 634 imply CMD_SAVES 635 help 636 Support for TI's DaVinci platform. 637 638config ARCH_HISTB 639 bool "Hisilicon HiSTB SoCs" 640 select DM 641 select DM_SERIAL 642 select OF_CONTROL 643 select PL01X_SERIAL 644 imply CMD_DM 645 help 646 Support for HiSTB SoCs. 647 648config ARCH_KIRKWOOD 649 bool "Marvell Kirkwood" 650 select ARCH_MISC_INIT 651 select BOARD_EARLY_INIT_F 652 select CPU_ARM926EJS 653 select GPIO_EXTRA_HEADER 654 select TIMER 655 656config ARCH_MVEBU 657 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" 658 select ARCH_EARLY_INIT_R if ARM64 659 select DM 660 select DM_SERIAL 661 select DM_SPI 662 select DM_SPI_FLASH 663 select GPIO_EXTRA_HEADER 664 select MTD 665 select SPL_DM_SPI if SPL 666 select SPL_DM_SPI_FLASH if SPL 667 select SPL_TIMER if SPL 668 select TIMER if !ARM64 669 select OF_CONTROL 670 select SPI 671 imply CMD_DM 672 673config ARCH_ORION5X 674 bool "Marvell Orion" 675 select CPU_ARM926EJS 676 select GPIO_EXTRA_HEADER 677 select SPL_SEPARATE_BSS if SPL 678 select TIMER 679 680config ARCH_BCM283X 681 bool "Broadcom BCM283X family" 682 select CPU 683 select DM 684 select DM_GPIO 685 select DM_SERIAL 686 select GPIO_EXTRA_HEADER 687 select OF_CONTROL 688 select PL01X_SERIAL 689 select SERIAL_SEARCH_ALL 690 imply CMD_DM 691 imply FAT_WRITE 692 imply OF_HAS_PRIOR_STAGE 693 694config ARCH_BCMSTB 695 bool "Broadcom BCM7XXX family" 696 select CPU_V7A 697 select DM 698 select GPIO_EXTRA_HEADER 699 select OF_CONTROL 700 imply CMD_DM 701 imply OF_HAS_PRIOR_STAGE 702 help 703 This enables support for Broadcom ARM-based set-top box 704 chipsets, including the 7445 family of chips. 705 706config ARCH_BCMBCA 707 bool "Broadcom broadband chip family" 708 select DM 709 select OF_CONTROL 710 imply CMD_DM 711 712config TARGET_VEXPRESS_CA9X4 713 bool "Support vexpress_ca9x4" 714 select CPU_V7A 715 select PL01X_SERIAL 716 717config TARGET_BCMNS 718 bool "Support Broadcom Northstar" 719 select CPU_V7A 720 select DM 721 select DM_GPIO 722 select DM_SERIAL 723 select OF_CONTROL 724 select TIMER 725 select SYS_NS16550 726 select ARM_GLOBAL_TIMER 727 imply SYS_THUMB_BUILD 728 imply MTD_RAW_NAND 729 imply NAND_BRCMNAND 730 imply NAND_BRCMNAND_IPROC 731 help 732 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit 733 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094, 734 BCM5301x etc. 735 736config TARGET_BCMNS3 737 bool "Support Broadcom NS3" 738 select ARM64 739 select BOARD_LATE_INIT 740 help 741 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit 742 ARMv8 Cortex-A72 processors targeting a broad range of networking 743 applications. 744 745config ARCH_EXYNOS 746 bool "Samsung EXYNOS" 747 select DM 748 select DM_GPIO 749 select DM_I2C 750 select DM_KEYBOARD 751 select DM_SERIAL 752 select DM_SPI 753 select DM_SPI_FLASH 754 select MTD 755 select SPI 756 select GPIO_EXTRA_HEADER 757 imply SYS_THUMB_BUILD 758 imply CMD_DM 759 imply FAT_WRITE 760 761config ARCH_S5PC1XX 762 bool "Samsung S5PC1XX" 763 select CPU_V7A 764 select DM 765 select DM_GPIO 766 select DM_I2C 767 select DM_SERIAL 768 select GPIO_EXTRA_HEADER 769 imply CMD_DM 770 771config ARCH_HIGHBANK 772 bool "Calxeda Highbank" 773 select CPU_V7A 774 select PL01X_SERIAL 775 select DM 776 select DM_SERIAL 777 select OF_CONTROL 778 select CLK 779 select CLK_CCF 780 select AHCI 781 select PHYS_64BIT 782 select TIMER 783 select SP804_TIMER 784 imply OF_HAS_PRIOR_STAGE 785 786config ARCH_INTEGRATOR 787 bool "ARM Ltd. Integrator family" 788 select DM 789 select DM_SERIAL 790 select GPIO_EXTRA_HEADER 791 select PL01X_SERIAL 792 imply CMD_DM 793 794config ARCH_IPQ40XX 795 bool "Qualcomm IPQ40xx SoCs" 796 select CPU_V7A 797 select DM 798 select DM_GPIO 799 select DM_SERIAL 800 select DM_RESET 801 select GPIO_EXTRA_HEADER 802 select PINCTRL 803 select CLK 804 select OF_CONTROL 805 select CLK_QCOM_IPQ4019 806 select PINCTRL_QCOM_IPQ4019 807 imply CMD_DM 808 imply OF_UPSTREAM 809 810config ARCH_KEYSTONE 811 bool "TI Keystone" 812 select CMD_DDR3 813 select CMD_POWEROFF 814 select CPU_V7A 815 select DDR_SPD 816 select SPL_BOARD_INIT if SPL 817 select SUPPORT_SPL 818 select SYS_ARCH_TIMER 819 select SYS_THUMB_BUILD 820 imply CMD_MTDPARTS 821 imply CMD_NFS 822 imply CMD_SAVES 823 imply DM_I2C 824 imply FIT 825 imply OF_BOARD_SETUP_EXTENDED 826 imply SOC_TI 827 imply TI_KEYSTONE_SERDES 828 829config ARCH_K3 830 bool "Texas Instruments' K3 Architecture" 831 select SPL 832 select SUPPORT_SPL 833 select FIT 834 select REGEX 835 select FIT_SIGNATURE if ARM64 836 select LTO 837 imply TI_SECURE_DEVICE 838 imply DM_RNG if ARM64 839 imply TEE if ARM64 840 imply OPTEE if ARM64 841 842config ARCH_OMAP2PLUS 843 bool "TI OMAP2+" 844 select CPU_V7A 845 select GPIO_EXTRA_HEADER 846 select SPL_SOC_INIT if SPL 847 select SPL_STACK_R if SPL 848 select SUPPORT_SPL 849 imply TI_SYSC if DM && OF_CONTROL 850 imply FIT 851 imply SPL_SEPARATE_BSS 852 853config ARCH_MESON 854 bool "Amlogic Meson" 855 select GPIO_EXTRA_HEADER 856 imply DISTRO_DEFAULTS 857 imply DM_RNG 858 help 859 Support for the Meson SoC family developed by Amlogic Inc., 860 targeted at media players and tablet computers. We currently 861 support the S905 (GXBaby) 64-bit SoC. 862 863config ARCH_MEDIATEK 864 bool "MediaTek SoCs" 865 select DM 866 select GPIO_EXTRA_HEADER 867 select OF_CONTROL 868 select SPL_DM if SPL 869 select SPL_LIBCOMMON_SUPPORT if SPL 870 select SPL_LIBGENERIC_SUPPORT if SPL 871 select SPL_OF_CONTROL if SPL 872 select SUPPORT_SPL 873 help 874 Support for the MediaTek SoCs family developed by MediaTek Inc. 875 Please refer to doc/README.mediatek for more information. 876 877config ARCH_MMP 878 bool "Marvell MMP" 879 select ARM64 880 select DM 881 select DM_SERIAL 882 select OF_CONTROL 883 select SAVE_PREV_BL_FDT_ADDR 884 select SAVE_PREV_BL_INITRAMFS_START_ADDR 885 886config ARCH_LPC32XX 887 bool "NXP LPC32xx platform" 888 select CPU_ARM926EJS 889 select DM 890 select DM_GPIO 891 select DM_SERIAL 892 select GPIO_EXTRA_HEADER 893 select SPL_DM if SPL 894 select SUPPORT_SPL 895 imply CMD_DM 896 897config ARCH_IMX8 898 bool "NXP i.MX8 platform" 899 select ARM64 900 select SYS_FSL_HAS_SEC 901 select SYS_FSL_SEC_COMPAT_4 902 select SYS_FSL_SEC_LE 903 select DM 904 select DM_EVENT 905 select GPIO_EXTRA_HEADER 906 select MACH_IMX 907 select OF_CONTROL 908 select ENABLE_ARM_SOC_BOOT0_HOOK 909 910config ARCH_IMX8M 911 bool "NXP i.MX8M platform" 912 select ARCH_MISC_INIT if FSL_CAAM 913 select ARM64 914 select GPIO_EXTRA_HEADER 915 select MACH_IMX 916 select SYS_FSL_HAS_SEC 917 select SYS_FSL_SEC_COMPAT_4 918 select SYS_FSL_SEC_LE 919 select SYS_I2C_MXC 920 select DM 921 select DM_EVENT if CLK 922 select SUPPORT_SPL 923 imply CMD_DM 924 925config ARCH_IMX8ULP 926 bool "NXP i.MX8ULP platform" 927 select ARM64 928 select DM 929 select DM_EVENT 930 select MACH_IMX 931 select OF_CONTROL 932 select SUPPORT_SPL 933 select GPIO_EXTRA_HEADER 934 select MISC 935 select IMX_ELE 936 imply CMD_DM 937 938config ARCH_IMX9 939 bool "NXP i.MX9 platform" 940 select ARM64 941 select DM 942 select DM_EVENT 943 select MACH_IMX 944 select SUPPORT_SPL 945 select GPIO_EXTRA_HEADER 946 select MISC 947 select IMX_ELE 948 imply CMD_DM 949 950config ARCH_IMXRT 951 bool "NXP i.MXRT platform" 952 select CPU_V7M 953 select DM 954 select DM_SERIAL 955 select GPIO_EXTRA_HEADER 956 select MACH_IMX 957 select SUPPORT_SPL 958 imply CMD_DM 959 960config ARCH_MX23 961 bool "NXP i.MX23 family" 962 select ARCH_MISC_INIT 963 select CPU_ARM926EJS 964 select GPIO_EXTRA_HEADER 965 select MACH_IMX 966 select SUPPORT_SPL 967 968config ARCH_MX28 969 bool "NXP i.MX28 family" 970 select ARCH_MISC_INIT 971 select CPU_ARM926EJS 972 select GPIO_EXTRA_HEADER 973 select MACH_IMX 974 select SUPPORT_SPL 975 976config ARCH_MX7ULP 977 bool "NXP MX7ULP" 978 select BOARD_POSTCLK_INIT 979 select CPU_V7A 980 select GPIO_EXTRA_HEADER 981 select MACH_IMX 982 select SYS_FSL_HAS_SEC 983 select SYS_FSL_SEC_COMPAT_4 984 select SYS_FSL_SEC_LE 985 select ROM_UNIFIED_SECTIONS 986 imply MXC_GPIO 987 imply SYS_THUMB_BUILD 988 989config ARCH_MX7 990 bool "Freescale MX7" 991 select ARCH_MISC_INIT 992 select CPU_V7A 993 select GPIO_EXTRA_HEADER 994 select MACH_IMX 995 select MXC_GPT_HCLK 996 select SYS_FSL_HAS_SEC 997 select SYS_FSL_SEC_COMPAT_4 998 select SYS_FSL_SEC_LE 999 imply BOARD_EARLY_INIT_F 1000 imply MXC_GPIO 1001 imply SYS_THUMB_BUILD 1002 1003config ARCH_MX6 1004 bool "Freescale MX6" 1005 select BOARD_POSTCLK_INIT 1006 select CPU_V7A 1007 select GPIO_EXTRA_HEADER 1008 select MACH_IMX 1009 select MXC_GPT_HCLK 1010 select SYS_FSL_HAS_SEC 1011 select SYS_FSL_SEC_COMPAT_4 1012 select SYS_FSL_SEC_LE 1013 select SYS_L2_PL310 if !SYS_L2CACHE_OFF 1014 imply MXC_GPIO 1015 imply SYS_THUMB_BUILD 1016 imply SPL_SEPARATE_BSS 1017 1018config ARCH_MX5 1019 bool "Freescale MX5" 1020 select BOARD_EARLY_INIT_F 1021 select CPU_V7A 1022 select GPIO_EXTRA_HEADER 1023 select MACH_IMX 1024 imply MXC_GPIO 1025 1026config ARCH_NEXELL 1027 bool "Nexell S5P4418/S5P6818 SoC" 1028 select ENABLE_ARM_SOC_BOOT0_HOOK 1029 select DM 1030 select GPIO_EXTRA_HEADER 1031 1032config ARCH_NPCM 1033 bool "Support Nuvoton SoCs" 1034 select DM 1035 select OF_CONTROL 1036 imply CMD_DM 1037 1038config ARCH_APPLE 1039 bool "Apple SoCs" 1040 select ARM64 1041 select CLK 1042 select CMD_PCI 1043 select CMD_USB 1044 select DM 1045 select DM_GPIO 1046 select DM_KEYBOARD 1047 select DM_MAILBOX 1048 select DM_RESET 1049 select DM_SERIAL 1050 select DM_SPI 1051 select DM_USB 1052 select VIDEO 1053 select IOMMU 1054 select LINUX_KERNEL_IMAGE_HEADER 1055 select MTD 1056 select OF_BOARD_SETUP 1057 select OF_CONTROL 1058 select PCI 1059 select PHY 1060 select PINCTRL 1061 select POSITION_INDEPENDENT 1062 select POWER_DOMAIN 1063 select REGMAP 1064 select SPI 1065 select SYSCON 1066 select SYSRESET 1067 select SYSRESET_WATCHDOG 1068 select SYSRESET_WATCHDOG_AUTO 1069 select USB 1070 imply CMD_DM 1071 imply CMD_GPT 1072 imply BOOTSTD_FULL 1073 imply OF_HAS_PRIOR_STAGE 1074 1075config ARCH_OWL 1076 bool "Actions Semi OWL SoCs" 1077 select DM 1078 select DM_SERIAL 1079 select GPIO_EXTRA_HEADER 1080 select OWL_SERIAL 1081 select CLK 1082 select CLK_OWL 1083 select OF_CONTROL 1084 select ENV_RELOC_GD_ENV_ADDR 1085 imply CMD_DM 1086 1087config ARCH_QEMU 1088 bool "QEMU Virtual Platform" 1089 select DM 1090 select DM_SERIAL 1091 select OF_CONTROL 1092 select PL01X_SERIAL 1093 imply CMD_DM 1094 imply DM_RNG 1095 imply DM_RTC 1096 imply RTC_PL031 1097 imply OF_HAS_PRIOR_STAGE if !TARGET_QEMU_ARM_SBSA 1098 imply VIDEO 1099 imply VIDEO_BOCHS 1100 imply SYS_WHITE_ON_BLACK 1101 imply SYS_CONSOLE_IS_IN_ENV 1102 imply PRE_CONSOLE_BUFFER 1103 imply USB 1104 imply USB_XHCI_HCD 1105 imply USB_XHCI_PCI 1106 imply USB_KEYBOARD 1107 imply CMD_USB 1108 imply POSITION_INDEPENDENT 1109 1110config ARCH_RENESAS 1111 bool "Renesas ARM SoCs" 1112 select ARCH_MISC_INIT if DISPLAY_CPUINFO && !(RZA1 || RZN1) 1113 select DM 1114 select DM_SERIAL 1115 select GPIO_EXTRA_HEADER 1116 select LTO 1117 imply BOARD_EARLY_INIT_F 1118 imply CMD_DM 1119 imply FAT_WRITE 1120 imply OF_UPSTREAM 1121 imply SYS_THUMB_BUILD 1122 1123config ARCH_SNAPDRAGON 1124 bool "Qualcomm Snapdragon SoCs" 1125 select ARM64 1126 select DM 1127 select DM_GPIO 1128 select DM_SERIAL 1129 select DM_RESET 1130 select POWER_DOMAIN 1131 select GPIO_EXTRA_HEADER 1132 select MSM_SMEM 1133 select OF_CONTROL 1134 select SMEM 1135 select SPMI 1136 select BOARD_LATE_INIT 1137 select OF_BOARD 1138 select SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK 1139 select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK 1140 select SYSRESET 1141 select SYSRESET_PSCI 1142 select ANDROID_BOOT_IMAGE_IGNORE_BLOB_ADDR 1143 imply OF_UPSTREAM 1144 imply CMD_DM 1145 imply DM_USB_GADGET 1146 1147config ARCH_SOCFPGA 1148 bool "Altera SOCFPGA family" 1149 select ARCH_EARLY_INIT_R 1150 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 1151 select ARM64 if TARGET_SOCFPGA_SOC64 1152 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1153 select DM 1154 select DM_SERIAL 1155 select GPIO_EXTRA_HEADER 1156 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1157 select LMB_ARCH_MEM_MAP if TARGET_SOCFPGA_SOC64 1158 select OF_CONTROL 1159 select SPL_DM_RESET if DM_RESET 1160 select SPL_DM_SERIAL 1161 select SPL_LIBCOMMON_SUPPORT 1162 select SPL_LIBGENERIC_SUPPORT 1163 select SPL_OF_CONTROL 1164 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 1165 select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64 1166 select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64 1167 select SPL_SERIAL 1168 select SPL_SYSRESET 1169 select SPL_WATCHDOG 1170 select SUPPORT_SPL 1171 select SYS_NS16550 1172 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1173 select SYSRESET 1174 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1175 select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \ 1176 TARGET_SOCFPGA_SOC64 1177 select SYSRESET_PSCI if TARGET_SOCFPGA_AGILEX5 1178 select USE_BOOTFILE if SPL_ATF && TARGET_SOCFPGA_SOC64 1179 imply CMD_DM 1180 imply CMD_MTDPARTS 1181 imply CRC32_VERIFY 1182 imply DM_SPI 1183 imply DM_SPI_FLASH 1184 imply FAT_WRITE 1185 imply MTD 1186 imply SPL 1187 imply SPL_DM 1188 imply SPL_DM_SPI 1189 imply SPL_DM_SPI_FLASH 1190 imply SPL_LIBDISK_SUPPORT 1191 imply SPL_MMC 1192 imply SPL_SPI_FLASH_SUPPORT 1193 imply SPL_SPI 1194 imply L2X0_CACHE 1195 1196config ARCH_SUNXI 1197 bool "Support sunxi (Allwinner) SoCs" 1198 select BINMAN 1199 select CMD_GPIO 1200 select CMD_MMC if MMC 1201 select CMD_USB if DISTRO_DEFAULTS && USB_HOST 1202 select CLK 1203 select DM 1204 select DM_GPIO 1205 select DM_I2C if I2C 1206 select DM_SPI if SPI 1207 select DM_SPI_FLASH if SPI && MTD 1208 select DM_KEYBOARD 1209 select DM_SERIAL 1210 select MMU_PGPROT if ARM64 1211 select OF_BOARD_SETUP 1212 select OF_CONTROL 1213 select PINCTRL 1214 select SPECIFY_CONSOLE_INDEX 1215 select SPL_SEPARATE_BSS if SPL 1216 select SPL_STACK_R if SPL 1217 select SPL_SYS_MALLOC_SIMPLE if SPL 1218 select SPL_SYS_THUMB_BUILD if SPL && !ARM64 1219 select SUNXI_GPIO 1220 select SYS_NS16550 1221 select SYS_THUMB_BUILD if !ARM64 1222 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST 1223 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST 1224 select SPL_USE_TINY_PRINTF if SPL 1225 select USE_PREBOOT 1226 select ENV_RELOC_GD_ENV_ADDR 1227 imply BOARD_LATE_INIT 1228 imply CMD_DM 1229 imply CMD_GPT 1230 imply CMD_UBI if MTD_RAW_NAND 1231 imply DISTRO_DEFAULTS 1232 imply DM_REGULATOR 1233 imply DM_REGULATOR_FIXED 1234 imply FAT_WRITE 1235 imply FIT 1236 imply OF_LIBFDT_OVERLAY 1237 imply PRE_CONSOLE_BUFFER 1238 imply SPL_GPIO 1239 imply SPL_LIBCOMMON_SUPPORT 1240 imply SPL_LIBGENERIC_SUPPORT 1241 imply SPL_MMC if MMC 1242 imply SPL_POWER 1243 imply SPL_SERIAL 1244 imply SYSRESET 1245 imply SYSRESET_WATCHDOG 1246 imply SYSRESET_WATCHDOG_AUTO 1247 imply USB 1248 imply USB_GADGET 1249 imply WDT 1250 1251config ARCH_U8500 1252 bool "ST-Ericsson U8500 Series" 1253 select CPU_V7A 1254 select DM 1255 select DM_GPIO 1256 select DM_SERIAL 1257 select DM_USB_GADGET if DM_USB 1258 select OF_CONTROL 1259 select SYSRESET 1260 select TIMER 1261 imply AB8500_USB_PHY 1262 imply ARM_PL180_MMCI 1263 imply CLK 1264 imply DM_PMIC 1265 imply DM_RTC 1266 imply NOMADIK_GPIO 1267 imply NOMADIK_MTU_TIMER 1268 imply PHY 1269 imply PL01X_SERIAL 1270 imply PMIC_AB8500 1271 imply RTC_PL031 1272 imply SYS_THUMB_BUILD 1273 imply SYSRESET_SYSCON 1274 1275config ARCH_VERSAL 1276 bool "Support Xilinx Versal Platform" 1277 select ARM64 1278 select CLK 1279 select DM 1280 select DM_SERIAL 1281 select GICV3 1282 select OF_CONTROL 1283 select SOC_DEVICE 1284 imply BOARD_LATE_INIT 1285 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1286 1287config ARCH_VERSAL2 1288 bool "Support AMD Versal Gen 2 Platform" 1289 select ARM64 1290 select CLK 1291 select DM 1292 select DM_SERIAL 1293 select OF_CONTROL 1294 imply BOARD_LATE_INIT 1295 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1296 imply ZYNQMP_FIRMWARE 1297 1298config ARCH_VERSAL_NET 1299 bool "Support Xilinx Versal NET Platform" 1300 select ARM64 1301 select CLK 1302 select DM 1303 select DM_SERIAL 1304 select OF_CONTROL 1305 imply BOARD_LATE_INIT 1306 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1307 1308config ARCH_VF610 1309 bool "Freescale Vybrid" 1310 select CPU_V7A 1311 select GPIO_EXTRA_HEADER 1312 select IOMUX_SHARE_CONF_REG 1313 select MACH_IMX 1314 select SYS_FSL_ERRATUM_ESDHC111 1315 imply CMD_MTDPARTS 1316 imply MTD_RAW_NAND 1317 1318config ARCH_ZYNQ 1319 bool "Xilinx Zynq based platform" 1320 select ARM_TWD_TIMER 1321 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA) 1322 select CLK 1323 select CLK_ZYNQ 1324 select CPU_V7A 1325 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART 1326 select DM 1327 select DM_SERIAL 1328 select DM_SPI 1329 select DM_SPI_FLASH 1330 select OF_CONTROL 1331 select MTD 1332 select SPI 1333 select SPL_SOC_INIT if SPL 1334 select SPL_CLK if SPL 1335 select SPL_DM if SPL 1336 select SPL_DM_SPI if SPL 1337 select SPL_DM_SPI_FLASH if SPL 1338 select SPL_OF_CONTROL if SPL 1339 select SPL_SEPARATE_BSS if SPL 1340 select SPL_TIMER if SPL 1341 select SUPPORT_SPL 1342 select TIMER 1343 imply BOARD_LATE_INIT 1344 imply CMD_CLK 1345 imply CMD_DM 1346 imply CMD_SPL 1347 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1348 imply FAT_WRITE 1349 1350config ARCH_ZYNQMP_R5 1351 bool "Xilinx ZynqMP R5 based platform" 1352 select CLK 1353 select CPU_V7R 1354 select DM 1355 select DM_SERIAL 1356 select OF_CONTROL 1357 imply CMD_DM 1358 imply DM_USB_GADGET 1359 1360config ARCH_ZYNQMP 1361 bool "Xilinx ZynqMP based platform" 1362 select ARM64 1363 select BINMAN 1364 select CLK 1365 select DM 1366 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART 1367 imply DM_MAILBOX 1368 select DM_SERIAL 1369 select MTD 1370 select DM_SPI if SPI 1371 select DM_SPI_FLASH if DM_SPI 1372 imply FIRMWARE 1373 select GICV2 1374 select OF_CONTROL 1375 select SPL_SOC_INIT if SPL 1376 select SPL_CLK if SPL 1377 select SPL_DM if SPL 1378 select SPL_DM_SPI if SPI && SPL_DM 1379 select SPL_DM_SPI_FLASH if SPL_DM_SPI 1380 select SPL_DM_MAILBOX if SPL 1381 imply SPL_FIRMWARE if SPL 1382 imply SPL_FS_FAT if SPL 1383 imply SPL_LIBCOMMON_SUPPORT if SPL 1384 imply SPL_LIBDISK_SUPPORT if SPL 1385 imply SPL_LIBGENERIC_SUPPORT if SPL 1386 imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ 1387 imply SPL_SERIAL if SPL 1388 imply SPL_SPI if SPL && ZYNQ_QSPI 1389 imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI 1390 select SPL_SEPARATE_BSS if SPL 1391 select SUPPORT_SPL 1392 imply ZYNQMP_IPI if DM_MAILBOX 1393 select SOC_DEVICE 1394 imply BOARD_LATE_INIT 1395 imply CMD_DM 1396 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1397 imply FAT_WRITE 1398 imply MP 1399 imply DM_USB_GADGET 1400 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB 1401 1402config ARCH_TEGRA 1403 bool "NVIDIA Tegra" 1404 select GPIO_EXTRA_HEADER 1405 imply BOOTSTD_DEFAULTS 1406 imply FAT_WRITE 1407 imply SPL_TIMER if SPL 1408 1409config ARCH_VEXPRESS64 1410 bool "Support ARMv8 Arm Ltd. VExpress based boards and models" 1411 select ARM64 1412 select DM 1413 select DM_SERIAL 1414 select PL01X_SERIAL 1415 select OF_CONTROL 1416 select CLK 1417 select MTD_NOR_FLASH if MTD 1418 select FLASH_CFI_DRIVER if MTD 1419 select ENV_IS_IN_FLASH if MTD 1420 imply DISTRO_DEFAULTS 1421 1422config TARGET_CORSTONE1000 1423 bool "Support Corstone1000 Platform" 1424 select ARM64 1425 select PL01X_SERIAL 1426 select DM 1427 1428config TARGET_TOTAL_COMPUTE 1429 bool "Support Total Compute Platform" 1430 select ARM64 1431 select PL01X_SERIAL 1432 select DM 1433 select DM_SERIAL 1434 select DM_GPIO 1435 select MMC 1436 imply OF_HAS_PRIOR_STAGE if !BLOBLIST 1437 imply MISC_INIT_R 1438 1439config TARGET_LS2080A_EMU 1440 bool "Support ls2080a_emu" 1441 select ARCH_LS2080A 1442 select ARM64 1443 select ARMV8_MULTIENTRY 1444 select FSL_DDR_SYNC_REFRESH 1445 select GPIO_EXTRA_HEADER 1446 help 1447 Support for Freescale LS2080A_EMU platform. 1448 The LS2080A Development System (EMULATOR) is a pre-silicon 1449 development platform that supports the QorIQ LS2080A 1450 Layerscape Architecture processor. 1451 1452config TARGET_LS1088AQDS 1453 bool "Support ls1088aqds" 1454 select ARCH_LS1088A 1455 select ARM64 1456 select ARMV8_MULTIENTRY 1457 select ARCH_SUPPORT_TFABOOT 1458 select BOARD_LATE_INIT 1459 select GPIO_EXTRA_HEADER 1460 select SUPPORT_SPL 1461 select FSL_DDR_INTERACTIVE if !SD_BOOT 1462 help 1463 Support for NXP LS1088AQDS platform. 1464 The LS1088A Development System (QDS) is a high-performance 1465 development platform that supports the QorIQ LS1088A 1466 Layerscape Architecture processor. 1467 1468config TARGET_LS2080AQDS 1469 bool "Support ls2080aqds" 1470 select ARCH_LS2080A 1471 select ARM64 1472 select ARMV8_MULTIENTRY 1473 select ARCH_SUPPORT_TFABOOT 1474 select BOARD_LATE_INIT 1475 select GPIO_EXTRA_HEADER 1476 select SUPPORT_SPL 1477 imply SCSI 1478 imply SCSI_AHCI 1479 select FSL_DDR_BIST 1480 select FSL_DDR_INTERACTIVE if !SPL 1481 help 1482 Support for Freescale LS2080AQDS platform. 1483 The LS2080A Development System (QDS) is a high-performance 1484 development platform that supports the QorIQ LS2080A 1485 Layerscape Architecture processor. 1486 1487config TARGET_LS2080ARDB 1488 bool "Support ls2080ardb" 1489 select ARCH_LS2080A 1490 select ARM64 1491 select ARMV8_MULTIENTRY 1492 select ARCH_SUPPORT_TFABOOT 1493 select BOARD_LATE_INIT 1494 select SUPPORT_SPL 1495 select FSL_DDR_BIST 1496 select FSL_DDR_INTERACTIVE if !SPL 1497 select GPIO_EXTRA_HEADER 1498 imply SCSI 1499 imply SCSI_AHCI 1500 help 1501 Support for Freescale LS2080ARDB platform. 1502 The LS2080A Reference design board (RDB) is a high-performance 1503 development platform that supports the QorIQ LS2080A 1504 Layerscape Architecture processor. 1505 1506config TARGET_LS2081ARDB 1507 bool "Support ls2081ardb" 1508 select ARCH_LS2080A 1509 select ARM64 1510 select ARMV8_MULTIENTRY 1511 select BOARD_LATE_INIT 1512 select GPIO_EXTRA_HEADER 1513 select SUPPORT_SPL 1514 help 1515 Support for Freescale LS2081ARDB platform. 1516 The LS2081A Reference design board (RDB) is a high-performance 1517 development platform that supports the QorIQ LS2081A/LS2041A 1518 Layerscape Architecture processor. 1519 1520config TARGET_LX2160ARDB 1521 bool "Support lx2160ardb" 1522 select ARCH_LX2160A 1523 select ARM64 1524 select ARMV8_MULTIENTRY 1525 select ARCH_SUPPORT_TFABOOT 1526 select BOARD_LATE_INIT 1527 select GPIO_EXTRA_HEADER 1528 help 1529 Support for NXP LX2160ARDB platform. 1530 The lx2160ardb (LX2160A Reference design board (RDB) 1531 is a high-performance development platform that supports the 1532 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1533 1534config TARGET_LX2160AQDS 1535 bool "Support lx2160aqds" 1536 select ARCH_LX2160A 1537 select ARM64 1538 select ARMV8_MULTIENTRY 1539 select ARCH_SUPPORT_TFABOOT 1540 select BOARD_LATE_INIT 1541 select GPIO_EXTRA_HEADER 1542 help 1543 Support for NXP LX2160AQDS platform. 1544 The lx2160aqds (LX2160A QorIQ Development System (QDS) 1545 is a high-performance development platform that supports the 1546 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1547 1548config TARGET_LX2162AQDS 1549 bool "Support lx2162aqds" 1550 select ARCH_LX2162A 1551 select ARM64 1552 select ARMV8_MULTIENTRY 1553 select ARCH_SUPPORT_TFABOOT 1554 select BOARD_LATE_INIT 1555 select GPIO_EXTRA_HEADER 1556 help 1557 Support for NXP LX2162AQDS platform. 1558 The lx2162aqds support is based on LX2160A Layerscape Architecture processor. 1559 1560config TARGET_HIKEY 1561 bool "Support HiKey 96boards Consumer Edition Platform" 1562 select ARM64 1563 select DM 1564 select DM_GPIO 1565 select DM_SERIAL 1566 select GPIO_EXTRA_HEADER 1567 select OF_CONTROL 1568 select PL01X_SERIAL 1569 select SPECIFY_CONSOLE_INDEX 1570 imply CMD_DM 1571 help 1572 Support for HiKey 96boards platform. It features a HI6220 1573 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. 1574 1575config TARGET_HIKEY960 1576 bool "Support HiKey960 96boards Consumer Edition Platform" 1577 select ARM64 1578 select DM 1579 select DM_SERIAL 1580 select GPIO_EXTRA_HEADER 1581 select OF_CONTROL 1582 select PL01X_SERIAL 1583 imply CMD_DM 1584 help 1585 Support for HiKey960 96boards platform. It features a HI3660 1586 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. 1587 1588config TARGET_POPLAR 1589 bool "Support Poplar 96boards Enterprise Edition Platform" 1590 select ARM64 1591 select DM 1592 select DM_SERIAL 1593 select GPIO_EXTRA_HEADER 1594 select OF_CONTROL 1595 select PL01X_SERIAL 1596 imply CMD_DM 1597 help 1598 Support for Poplar 96boards EE platform. It features a HI3798cv200 1599 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU 1600 making it capable of running any commercial set-top solution based on 1601 Linux or Android. 1602 1603config TARGET_LS1012AQDS 1604 bool "Support ls1012aqds" 1605 select ARCH_LS1012A 1606 select ARM64 1607 select ARCH_SUPPORT_TFABOOT 1608 select BOARD_LATE_INIT 1609 select GPIO_EXTRA_HEADER 1610 help 1611 Support for Freescale LS1012AQDS platform. 1612 The LS1012A Development System (QDS) is a high-performance 1613 development platform that supports the QorIQ LS1012A 1614 Layerscape Architecture processor. 1615 1616config TARGET_LS1012ARDB 1617 bool "Support ls1012ardb" 1618 select ARCH_LS1012A 1619 select ARM64 1620 select ARCH_SUPPORT_TFABOOT 1621 select BOARD_LATE_INIT 1622 select GPIO_EXTRA_HEADER 1623 imply SCSI 1624 imply SCSI_AHCI 1625 help 1626 Support for Freescale LS1012ARDB platform. 1627 The LS1012A Reference design board (RDB) is a high-performance 1628 development platform that supports the QorIQ LS1012A 1629 Layerscape Architecture processor. 1630 1631config TARGET_LS1012A2G5RDB 1632 bool "Support ls1012a2g5rdb" 1633 select ARCH_LS1012A 1634 select ARM64 1635 select ARCH_SUPPORT_TFABOOT 1636 select BOARD_LATE_INIT 1637 select GPIO_EXTRA_HEADER 1638 imply SCSI 1639 help 1640 Support for Freescale LS1012A2G5RDB platform. 1641 The LS1012A 2G5 Reference design board (RDB) is a high-performance 1642 development platform that supports the QorIQ LS1012A 1643 Layerscape Architecture processor. 1644 1645config TARGET_LS1012AFRWY 1646 bool "Support ls1012afrwy" 1647 select ARCH_LS1012A 1648 select ARM64 1649 select ARCH_SUPPORT_TFABOOT 1650 select BOARD_LATE_INIT 1651 select GPIO_EXTRA_HEADER 1652 imply SCSI 1653 imply SCSI_AHCI 1654 help 1655 Support for Freescale LS1012AFRWY platform. 1656 The LS1012A FRWY board (FRWY) is a high-performance 1657 development platform that supports the QorIQ LS1012A 1658 Layerscape Architecture processor. 1659 1660config TARGET_LS1012AFRDM 1661 bool "Support ls1012afrdm" 1662 select ARCH_LS1012A 1663 select ARM64 1664 select ARCH_SUPPORT_TFABOOT 1665 select GPIO_EXTRA_HEADER 1666 help 1667 Support for Freescale LS1012AFRDM platform. 1668 The LS1012A Freedom board (FRDM) is a high-performance 1669 development platform that supports the QorIQ LS1012A 1670 Layerscape Architecture processor. 1671 1672config TARGET_LS1028AQDS 1673 bool "Support ls1028aqds" 1674 select ARCH_LS1028A 1675 select ARM64 1676 select ARMV8_MULTIENTRY 1677 select ARCH_SUPPORT_TFABOOT 1678 select BOARD_LATE_INIT 1679 select GPIO_EXTRA_HEADER 1680 help 1681 Support for Freescale LS1028AQDS platform 1682 The LS1028A Development System (QDS) is a high-performance 1683 development platform that supports the QorIQ LS1028A 1684 Layerscape Architecture processor. 1685 1686config TARGET_LS1028ARDB 1687 bool "Support ls1028ardb" 1688 select ARCH_LS1028A 1689 select ARM64 1690 select ARMV8_MULTIENTRY 1691 select ARCH_SUPPORT_TFABOOT 1692 select BOARD_LATE_INIT 1693 select GPIO_EXTRA_HEADER 1694 help 1695 Support for Freescale LS1028ARDB platform 1696 The LS1028A Development System (RDB) is a high-performance 1697 development platform that supports the QorIQ LS1028A 1698 Layerscape Architecture processor. 1699 1700config TARGET_LS1088ARDB 1701 bool "Support ls1088ardb" 1702 select ARCH_LS1088A 1703 select ARM64 1704 select ARMV8_MULTIENTRY 1705 select ARCH_SUPPORT_TFABOOT 1706 select BOARD_LATE_INIT 1707 select SUPPORT_SPL 1708 select FSL_DDR_INTERACTIVE if !SD_BOOT 1709 select GPIO_EXTRA_HEADER 1710 help 1711 Support for NXP LS1088ARDB platform. 1712 The LS1088A Reference design board (RDB) is a high-performance 1713 development platform that supports the QorIQ LS1088A 1714 Layerscape Architecture processor. 1715 1716config TARGET_LS1021AQDS 1717 bool "Support ls1021aqds" 1718 select ARCH_LS1021A 1719 select ARCH_SUPPORT_PSCI 1720 select BOARD_EARLY_INIT_F 1721 select BOARD_LATE_INIT 1722 select CPU_V7A 1723 select CPU_V7_HAS_NONSEC 1724 select CPU_V7_HAS_VIRT 1725 select LS1_DEEP_SLEEP 1726 select PEN_ADDR_BIG_ENDIAN 1727 select SUPPORT_SPL 1728 select SYS_FSL_DDR 1729 select FSL_DDR_INTERACTIVE 1730 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1731 select GPIO_EXTRA_HEADER 1732 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI 1733 imply SCSI 1734 1735config TARGET_LS1021ATWR 1736 bool "Support ls1021atwr" 1737 select ARCH_LS1021A 1738 select ARCH_SUPPORT_PSCI 1739 select BOARD_EARLY_INIT_F 1740 select BOARD_LATE_INIT 1741 select CPU_V7A 1742 select CPU_V7_HAS_NONSEC 1743 select CPU_V7_HAS_VIRT 1744 select LS1_DEEP_SLEEP 1745 select PEN_ADDR_BIG_ENDIAN 1746 select SUPPORT_SPL 1747 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1748 select GPIO_EXTRA_HEADER 1749 imply SCSI 1750 1751config TARGET_PG_WCOM_SELI8 1752 bool "Support Hitachi-Powergrids SELI8 service unit card" 1753 select ARCH_LS1021A 1754 select ARCH_SUPPORT_PSCI 1755 select BOARD_EARLY_INIT_F 1756 select BOARD_LATE_INIT 1757 select CPU_V7A 1758 select CPU_V7_HAS_NONSEC 1759 select CPU_V7_HAS_VIRT 1760 select SYS_FSL_DDR 1761 select FSL_DDR_INTERACTIVE 1762 select GPIO_EXTRA_HEADER 1763 select VENDOR_KM 1764 imply SCSI 1765 help 1766 Support for Hitachi-Powergrids SELI8 service unit card. 1767 SELI8 is a QorIQ LS1021a based service unit card used 1768 in XMC20 and FOX615 product families. 1769 1770config TARGET_PG_WCOM_EXPU1 1771 bool "Support Hitachi-Powergrids EXPU1 service unit card" 1772 select ARCH_LS1021A 1773 select ARCH_SUPPORT_PSCI 1774 select BOARD_EARLY_INIT_F 1775 select BOARD_LATE_INIT 1776 select CPU_V7A 1777 select CPU_V7_HAS_NONSEC 1778 select CPU_V7_HAS_VIRT 1779 select SYS_FSL_DDR 1780 select FSL_DDR_INTERACTIVE 1781 select VENDOR_KM 1782 imply SCSI 1783 help 1784 Support for Hitachi-Powergrids EXPU1 service unit card. 1785 EXPU1 is a QorIQ LS1021a based service unit card used 1786 in XMC20 and FOX615 product families. 1787 1788config TARGET_LS1021ATSN 1789 bool "Support ls1021atsn" 1790 select ARCH_LS1021A 1791 select ARCH_SUPPORT_PSCI 1792 select BOARD_EARLY_INIT_F 1793 select BOARD_LATE_INIT 1794 select CPU_V7A 1795 select CPU_V7_HAS_NONSEC 1796 select CPU_V7_HAS_VIRT 1797 select LS1_DEEP_SLEEP 1798 select SUPPORT_SPL 1799 select GPIO_EXTRA_HEADER 1800 imply SCSI 1801 1802config TARGET_LS1021AIOT 1803 bool "Support ls1021aiot" 1804 select ARCH_LS1021A 1805 select ARCH_SUPPORT_PSCI 1806 select BOARD_LATE_INIT 1807 select CPU_V7A 1808 select CPU_V7_HAS_NONSEC 1809 select CPU_V7_HAS_VIRT 1810 select PEN_ADDR_BIG_ENDIAN 1811 select SUPPORT_SPL 1812 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1813 select GPIO_EXTRA_HEADER 1814 imply SCSI 1815 help 1816 Support for Freescale LS1021AIOT platform. 1817 The LS1021A Freescale board (IOT) is a high-performance 1818 development platform that supports the QorIQ LS1021A 1819 Layerscape Architecture processor. 1820 1821config TARGET_LS1043AQDS 1822 bool "Support ls1043aqds" 1823 select ARCH_LS1043A 1824 select ARM64 1825 select ARMV8_MULTIENTRY 1826 select ARCH_SUPPORT_TFABOOT 1827 select BOARD_EARLY_INIT_F 1828 select BOARD_LATE_INIT 1829 select SUPPORT_SPL 1830 select FSL_DDR_INTERACTIVE if !SPL 1831 select FSL_DSPI if !SPL_NO_DSPI 1832 select DM_SPI_FLASH if FSL_DSPI 1833 select GPIO_EXTRA_HEADER 1834 imply SCSI 1835 imply SCSI_AHCI 1836 help 1837 Support for Freescale LS1043AQDS platform. 1838 1839config TARGET_LS1043ARDB 1840 bool "Support ls1043ardb" 1841 select ARCH_LS1043A 1842 select ARM64 1843 select ARMV8_MULTIENTRY 1844 select ARCH_SUPPORT_TFABOOT 1845 select BOARD_EARLY_INIT_F 1846 select BOARD_LATE_INIT 1847 select SUPPORT_SPL 1848 select FSL_DSPI if !SPL_NO_DSPI 1849 select DM_SPI_FLASH if FSL_DSPI 1850 select GPIO_EXTRA_HEADER 1851 help 1852 Support for Freescale LS1043ARDB platform. 1853 1854config TARGET_LS1046AQDS 1855 bool "Support ls1046aqds" 1856 select ARCH_LS1046A 1857 select ARM64 1858 select ARMV8_MULTIENTRY 1859 select ARCH_SUPPORT_TFABOOT 1860 select BOARD_EARLY_INIT_F 1861 select BOARD_LATE_INIT 1862 select DM_SPI_FLASH if DM_SPI 1863 select SUPPORT_SPL 1864 select FSL_DDR_BIST if !SPL 1865 select FSL_DDR_INTERACTIVE if !SPL 1866 select FSL_DDR_INTERACTIVE if !SPL 1867 select GPIO_EXTRA_HEADER 1868 imply SCSI 1869 help 1870 Support for Freescale LS1046AQDS platform. 1871 The LS1046A Development System (QDS) is a high-performance 1872 development platform that supports the QorIQ LS1046A 1873 Layerscape Architecture processor. 1874 1875config TARGET_LS1046ARDB 1876 bool "Support ls1046ardb" 1877 select ARCH_LS1046A 1878 select ARM64 1879 select ARMV8_MULTIENTRY 1880 select ARCH_SUPPORT_TFABOOT 1881 select BOARD_EARLY_INIT_F 1882 select BOARD_LATE_INIT 1883 select DM_SPI_FLASH if DM_SPI 1884 select POWER_MC34VR500 1885 select SUPPORT_SPL 1886 select FSL_DDR_BIST 1887 select FSL_DDR_INTERACTIVE if !SPL 1888 select GPIO_EXTRA_HEADER 1889 imply SCSI 1890 help 1891 Support for Freescale LS1046ARDB platform. 1892 The LS1046A Reference Design Board (RDB) is a high-performance 1893 development platform that supports the QorIQ LS1046A 1894 Layerscape Architecture processor. 1895 1896config TARGET_LS1046AFRWY 1897 bool "Support ls1046afrwy" 1898 select ARCH_LS1046A 1899 select ARM64 1900 select ARMV8_MULTIENTRY 1901 select ARCH_SUPPORT_TFABOOT 1902 select BOARD_EARLY_INIT_F 1903 select BOARD_LATE_INIT 1904 select DM_SPI_FLASH if DM_SPI 1905 select GPIO_EXTRA_HEADER 1906 imply SCSI 1907 help 1908 Support for Freescale LS1046AFRWY platform. 1909 The LS1046A Freeway Board (FRWY) is a high-performance 1910 development platform that supports the QorIQ LS1046A 1911 Layerscape Architecture processor. 1912 1913config ARCH_SC5XX 1914 bool "Analog Devices SC5XX-processor family" 1915 select ADI_SC5XX_TIMER 1916 select DM 1917 select DM_SERIAL 1918 select HAS_CUSTOM_SYS_INIT_SP_ADDR 1919 select PANIC_HANG 1920 select SPL 1921 select SPL_BOOTROM_SUPPORT 1922 select SPL_DM 1923 select SPL_DM_SEQ_ALIAS 1924 select SPL_LIBGENERIC_SUPPORT 1925 select SPL_LIBCOMMON_SUPPORT 1926 select SPL_SKIP_LOWLEVEL_INIT 1927 select SUPPORT_SPL 1928 select TIMER 1929 1930config TARGET_SL28 1931 bool "Support sl28" 1932 select ARCH_LS1028A 1933 select ARM64 1934 select ARMV8_MULTIENTRY 1935 select SUPPORT_SPL 1936 select BINMAN 1937 select DM 1938 select DM_GPIO 1939 select DM_I2C 1940 select MMC 1941 select MTD 1942 select DM_SPI_FLASH 1943 select DM_MDIO 1944 select PCI 1945 select DM_RNG 1946 select DM_RTC 1947 select SCSI 1948 select DM_SERIAL 1949 select DM_SPI 1950 select GPIO_EXTRA_HEADER 1951 select SPL_DM if SPL 1952 select SPL_DM_SPI if SPL 1953 select SPL_DM_SPI_FLASH if SPL 1954 select SPL_DM_I2C if SPL 1955 select SPL_DM_MMC if SPL 1956 select SPL_DM_SERIAL if SPL 1957 help 1958 Support for Kontron SMARC-sAL28 board. 1959 1960config TARGET_TEN64 1961 bool "Support ten64" 1962 select ARCH_LS1088A 1963 select ARM64 1964 select ARMV8_MULTIENTRY 1965 select ARCH_SUPPORT_TFABOOT 1966 select BOARD_LATE_INIT 1967 select SUPPORT_SPL 1968 select FSL_DDR_INTERACTIVE if !SD_BOOT 1969 select GPIO_EXTRA_HEADER 1970 help 1971 Support for Traverse Technologies Ten64 board, based 1972 on NXP LS1088A. 1973 1974config ARCH_UNIPHIER 1975 bool "Socionext UniPhier SoCs" 1976 select BOARD_LATE_INIT 1977 select DM 1978 select DM_GPIO 1979 select DM_I2C 1980 select DM_MTD 1981 select DM_RESET 1982 select DM_SERIAL 1983 select MMC 1984 select OF_BOARD_SETUP 1985 select OF_CONTROL 1986 select OF_LIBFDT 1987 select PINCTRL 1988 select SPL_BOARD_INIT if SPL 1989 select SPL_DM if SPL 1990 select SPL_LIBCOMMON_SUPPORT if SPL 1991 select SPL_LIBGENERIC_SUPPORT if SPL 1992 select SPL_OF_CONTROL if SPL 1993 select SPL_PINCTRL if SPL 1994 select SUPPORT_SPL 1995 imply CMD_DM 1996 imply DISTRO_DEFAULTS 1997 imply FAT_WRITE 1998 help 1999 Support for UniPhier SoC family developed by Socionext Inc. 2000 (formerly, System LSI Business Division of Panasonic Corporation) 2001 2002config ARCH_SYNQUACER 2003 bool "Socionext SynQuacer SoCs" 2004 select ARM64 2005 select DM 2006 select GIC_V3 2007 select PSCI_RESET 2008 select SYSRESET 2009 select SYSRESET_PSCI 2010 select OF_CONTROL 2011 help 2012 Support for SynQuacer SoC family developed by Socionext Inc. 2013 This SoC is used on 96boards EE DeveloperBox. 2014 2015config ARCH_STM32 2016 bool "Support STMicroelectronics STM32 MCU with cortex M" 2017 select CPU_V7M 2018 select DM 2019 select DM_SERIAL 2020 imply CMD_DM 2021 2022config ARCH_STI 2023 bool "Support STMicroelectronics SoCs" 2024 select CPU_V7A 2025 select DM 2026 select DM_RESET 2027 select DM_SERIAL 2028 select MMC 2029 imply CMD_DM 2030 help 2031 Support for STMicroelectronics STiH407/10 SoC family. 2032 This SoC is used on Linaro 96Board STiH410-B2260 2033 2034config ARCH_STM32MP 2035 bool "Support STMicroelectronics STM32MP Socs with cortex A" 2036 select ARCH_MISC_INIT 2037 select ARCH_SUPPORT_TFABOOT 2038 select BOARD_LATE_INIT 2039 select CLK 2040 select DM 2041 select DM_GPIO 2042 select DM_RESET 2043 select DM_SERIAL 2044 select MISC 2045 select OF_CONTROL 2046 select OF_LIBFDT 2047 select OF_SYSTEM_SETUP 2048 select PINCTRL 2049 select REGMAP 2050 select SYSCON 2051 select SYSRESET 2052 select SYS_THUMB_BUILD if !ARM64 2053 imply SPL_SYSRESET 2054 imply CMD_DM 2055 imply CMD_POWEROFF 2056 imply OF_LIBFDT_OVERLAY 2057 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 2058 imply USE_PREBOOT 2059 imply TIMESTAMP 2060 help 2061 Support for STM32MP SoC family developed by STMicroelectronics, 2062 MPUs based on ARM cortex A core 2063 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). 2064 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot 2065 chain. 2066 SPL is the unsecure FSBL for the basic boot chain. 2067 2068config ARCH_ROCKCHIP 2069 bool "Support Rockchip SoCs" 2070 select BINMAN if SPL_OPTEE || SPL 2071 select DM 2072 select DM_GPIO 2073 select DM_I2C 2074 select DM_PWM 2075 select DM_REGULATOR 2076 select DM_SERIAL 2077 select DM_SPI 2078 select DM_SPI_FLASH 2079 select DM_USB_GADGET if USB_DWC3_GADGET 2080 select ENABLE_ARM_SOC_BOOT0_HOOK 2081 select OF_CONTROL 2082 select MMC 2083 select MTD 2084 select SPI 2085 select SPL_DM if SPL 2086 select SPL_DM_SPI if SPL 2087 select SPL_DM_SPI_FLASH if SPL 2088 select SYS_MALLOC_F 2089 select SYS_THUMB_BUILD if !ARM64 2090 imply ADC 2091 imply CMD_DM 2092 imply DEBUG_UART_BOARD_INIT 2093 imply BOOTSTD_DEFAULTS 2094 imply FAT_WRITE 2095 imply SARADC_ROCKCHIP 2096 imply SPL_SYSRESET 2097 imply SPL_SYS_MALLOC_SIMPLE 2098 imply SYS_NS16550 2099 imply TPL_SYSRESET 2100 imply USB_FUNCTION_FASTBOOT 2101 2102config ARCH_OCTEONTX 2103 bool "Support OcteonTX SoCs" 2104 select CLK 2105 select DM 2106 select GPIO_EXTRA_HEADER 2107 select ARM64 2108 select OF_CONTROL 2109 select OF_LIVE 2110 select BOARD_LATE_INIT 2111 select SYS_CACHE_SHIFT_7 2112 select SYS_PCI_64BIT if PCI 2113 imply OF_HAS_PRIOR_STAGE 2114 2115config ARCH_OCTEONTX2 2116 bool "Support OcteonTX2 SoCs" 2117 select CLK 2118 select DM 2119 select GPIO_EXTRA_HEADER 2120 select ARM64 2121 select OF_CONTROL 2122 select OF_LIVE 2123 select BOARD_LATE_INIT 2124 select SYS_CACHE_SHIFT_7 2125 select SYS_PCI_64BIT if PCI 2126 imply OF_HAS_PRIOR_STAGE 2127 2128config TARGET_THUNDERX_88XX 2129 bool "Support ThunderX 88xx" 2130 select ARM64 2131 select GPIO_EXTRA_HEADER 2132 select OF_CONTROL 2133 select PL01X_SERIAL 2134 select SYS_CACHE_SHIFT_7 2135 2136config ARCH_ASPEED 2137 bool "Support Aspeed SoCs" 2138 select DM 2139 select OF_CONTROL 2140 imply CMD_DM 2141 2142config TARGET_DURIAN 2143 bool "Support Phytium Durian Platform" 2144 select ARM64 2145 select GPIO_EXTRA_HEADER 2146 help 2147 Support for durian platform. 2148 It has 2GB Sdram, uart and pcie. 2149 2150config TARGET_POMELO 2151 bool "Support Phytium Pomelo Platform" 2152 select ARM64 2153 select DM 2154 select AHCI 2155 select SCSI_AHCI 2156 select AHCI_PCI 2157 select PCI 2158 select DM_PCI 2159 select SCSI 2160 select DM_SERIAL 2161 imply CMD_PCI 2162 help 2163 Support for pomelo platform. 2164 It has 8GB Sdram, uart and pcie. 2165 2166config TARGET_PE2201 2167 bool "Support Phytium PE2201 Platform" 2168 select ARM64 2169 help 2170 Support for pe2201 platform.It has 2GB Sdram, uart and pcie. 2171 2172config TARGET_PRESIDIO_ASIC 2173 bool "Support Cortina Presidio ASIC Platform" 2174 select ARM64 2175 select GICV2 2176 2177config TARGET_XENGUEST_ARM64 2178 bool "Xen guest ARM64" 2179 select ARM64 2180 select XEN 2181 select OF_CONTROL 2182 select LINUX_KERNEL_IMAGE_HEADER 2183 select XEN_SERIAL 2184 imply OF_HAS_PRIOR_STAGE 2185 2186config ARCH_GXP 2187 bool "Support HPE GXP SoCs" 2188 select DM 2189 select OF_CONTROL 2190 imply CMD_DM 2191 2192endchoice 2193 2194config SUPPORT_PASSING_ATAGS 2195 bool "Support pre-devicetree ATAG-based booting" 2196 depends on !ARM64 2197 imply SETUP_MEMORY_TAGS 2198 help 2199 Support for booting older Linux kernels, using ATAGs rather than 2200 passing a devicetree. This is option is rarely used, and the 2201 semantics are defined at 2202 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a. 2203 2204config SETUP_MEMORY_TAGS 2205 bool "Pass memory size information via ATAG" 2206 depends on SUPPORT_PASSING_ATAGS 2207 2208config CMDLINE_TAG 2209 bool "Pass Linux kernel cmdline via ATAG" 2210 depends on SUPPORT_PASSING_ATAGS 2211 2212config INITRD_TAG 2213 bool "Pass initrd starting point and size via ATAG" 2214 depends on SUPPORT_PASSING_ATAGS 2215 2216config REVISION_TAG 2217 bool "Pass system revision via ATAG" 2218 depends on SUPPORT_PASSING_ATAGS 2219 2220config SERIAL_TAG 2221 bool "Pass system serial number via ATAG" 2222 depends on SUPPORT_PASSING_ATAGS 2223 2224config STATIC_MACH_TYPE 2225 bool "Statically define the Machine ID number" 2226 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" 2227 depends on SUPPORT_PASSING_ATAGS 2228 help 2229 When booting via ATAGs, enable this option if we know the correct 2230 machine ID number to use at compile time. Some systems will be 2231 passed the number dynamically by whatever loads U-Boot. 2232 2233config MACH_TYPE 2234 int "Machine ID number" 2235 depends on STATIC_MACH_TYPE 2236 default 527 if TARGET_DS109 2237 default 3036 if TARGET_DS414 2238 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" 2239 help 2240 When booting via ATAGs, the machine type must be passed as a number. 2241 For the full list see https://www.arm.linux.org.uk/developer/machines 2242 2243config ARCH_SUPPORT_TFABOOT 2244 bool 2245 2246config TFABOOT 2247 bool "Support for booting from TF-A" 2248 depends on ARCH_SUPPORT_TFABOOT 2249 help 2250 Some platforms support the setup of secure registers (for instance 2251 for CPU errata handling) or provide secure services like PSCI. 2252 Those services could also be provided by other firmware parts 2253 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot 2254 does not need to (and cannot) execute this code. 2255 Enabling this option will make a U-Boot binary that is relying 2256 on other firmware layers to provide secure functionality. 2257 2258config TI_SECURE_DEVICE 2259 bool "HS Device Type Support" 2260 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 2261 help 2262 If a high secure (HS) device type is being used, this config 2263 must be set. This option impacts various aspects of the 2264 build system (to create signed boot images that can be 2265 authenticated) and the code. See the doc/README.ti-secure 2266 file for further details. 2267 2268config SYS_KWD_CONFIG 2269 string "kwbimage config file path" 2270 depends on ARCH_KIRKWOOD || ARCH_MVEBU 2271 default "arch/arm/mach-mvebu/kwbimage.cfg" 2272 help 2273 Path within the source directory to the kwbimage.cfg file to use 2274 when packaging the U-Boot image for use. 2275 2276source "arch/arm/mach-airoha/Kconfig" 2277 2278source "arch/arm/mach-apple/Kconfig" 2279 2280source "arch/arm/mach-aspeed/Kconfig" 2281 2282source "arch/arm/mach-at91/Kconfig" 2283 2284source "arch/arm/mach-bcm283x/Kconfig" 2285 2286source "arch/arm/mach-bcmbca/Kconfig" 2287 2288source "arch/arm/mach-bcmstb/Kconfig" 2289 2290source "arch/arm/mach-davinci/Kconfig" 2291 2292source "arch/arm/mach-exynos/Kconfig" 2293 2294source "arch/arm/mach-hpe/gxp/Kconfig" 2295 2296source "arch/arm/mach-highbank/Kconfig" 2297 2298source "arch/arm/mach-histb/Kconfig" 2299 2300source "arch/arm/mach-integrator/Kconfig" 2301 2302source "arch/arm/mach-ipq40xx/Kconfig" 2303 2304source "arch/arm/mach-k3/Kconfig" 2305 2306source "arch/arm/mach-keystone/Kconfig" 2307 2308source "arch/arm/mach-kirkwood/Kconfig" 2309 2310source "arch/arm/mach-lpc32xx/Kconfig" 2311 2312source "arch/arm/mach-mvebu/Kconfig" 2313 2314source "arch/arm/mach-octeontx/Kconfig" 2315 2316source "arch/arm/mach-octeontx2/Kconfig" 2317 2318source "arch/arm/cpu/armv7/ls102xa/Kconfig" 2319 2320source "arch/arm/mach-imx/mx5/Kconfig" 2321 2322source "arch/arm/mach-imx/mx6/Kconfig" 2323 2324source "arch/arm/mach-imx/mx7/Kconfig" 2325 2326source "arch/arm/mach-imx/mx7ulp/Kconfig" 2327 2328source "arch/arm/mach-imx/imx8/Kconfig" 2329 2330source "arch/arm/mach-imx/imx8m/Kconfig" 2331 2332source "arch/arm/mach-imx/imx8ulp/Kconfig" 2333 2334source "arch/arm/mach-imx/imx9/Kconfig" 2335 2336source "arch/arm/mach-imx/imxrt/Kconfig" 2337 2338source "arch/arm/mach-imx/mxs/Kconfig" 2339 2340source "arch/arm/mach-omap2/Kconfig" 2341 2342source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" 2343 2344source "arch/arm/mach-orion5x/Kconfig" 2345 2346source "arch/arm/mach-owl/Kconfig" 2347 2348source "arch/arm/mach-renesas/Kconfig" 2349 2350source "arch/arm/mach-meson/Kconfig" 2351 2352source "arch/arm/mach-mediatek/Kconfig" 2353 2354source "arch/arm/mach-mmp/Kconfig" 2355 2356source "arch/arm/mach-qemu/Kconfig" 2357 2358source "arch/arm/mach-rockchip/Kconfig" 2359 2360source "arch/arm/mach-s5pc1xx/Kconfig" 2361 2362source "arch/arm/mach-sc5xx/Kconfig" 2363 2364source "arch/arm/mach-snapdragon/Kconfig" 2365 2366source "arch/arm/mach-socfpga/Kconfig" 2367 2368source "arch/arm/mach-sti/Kconfig" 2369 2370source "arch/arm/mach-stm32/Kconfig" 2371 2372source "arch/arm/mach-stm32mp/Kconfig" 2373 2374source "arch/arm/mach-sunxi/Kconfig" 2375 2376source "arch/arm/mach-tegra/Kconfig" 2377 2378source "arch/arm/mach-u8500/Kconfig" 2379 2380source "arch/arm/mach-uniphier/Kconfig" 2381 2382source "arch/arm/cpu/armv7/vf610/Kconfig" 2383 2384source "arch/arm/mach-zynq/Kconfig" 2385 2386source "arch/arm/mach-zynqmp/Kconfig" 2387 2388source "arch/arm/mach-versal/Kconfig" 2389 2390source "arch/arm/mach-versal2/Kconfig" 2391 2392source "arch/arm/mach-versal-net/Kconfig" 2393 2394source "arch/arm/mach-zynqmp-r5/Kconfig" 2395 2396source "arch/arm/cpu/armv7/Kconfig" 2397 2398source "arch/arm/cpu/armv8/Kconfig" 2399 2400source "arch/arm/mach-imx/Kconfig" 2401 2402source "arch/arm/mach-nexell/Kconfig" 2403 2404source "arch/arm/mach-npcm/Kconfig" 2405 2406source "board/armltd/total_compute/Kconfig" 2407source "board/armltd/corstone1000/Kconfig" 2408source "board/bosch/shc/Kconfig" 2409source "board/bosch/guardian/Kconfig" 2410source "board/Marvell/octeontx/Kconfig" 2411source "board/Marvell/octeontx2/Kconfig" 2412source "board/armltd/vexpress/Kconfig" 2413source "board/armltd/vexpress64/Kconfig" 2414source "board/cortina/presidio-asic/Kconfig" 2415source "board/broadcom/bcmns/Kconfig" 2416source "board/broadcom/bcmns3/Kconfig" 2417source "board/cavium/thunderx/Kconfig" 2418source "board/eets/pdu001/Kconfig" 2419source "board/emulation/qemu-arm/Kconfig" 2420source "board/emulation/qemu-sbsa/Kconfig" 2421source "board/freescale/ls2080aqds/Kconfig" 2422source "board/freescale/ls2080ardb/Kconfig" 2423source "board/freescale/ls1088a/Kconfig" 2424source "board/freescale/ls1028a/Kconfig" 2425source "board/freescale/ls1021aqds/Kconfig" 2426source "board/freescale/ls1043aqds/Kconfig" 2427source "board/freescale/ls1021atwr/Kconfig" 2428source "board/freescale/ls1021atsn/Kconfig" 2429source "board/freescale/ls1021aiot/Kconfig" 2430source "board/freescale/ls1046aqds/Kconfig" 2431source "board/freescale/ls1043ardb/Kconfig" 2432source "board/freescale/ls1046ardb/Kconfig" 2433source "board/freescale/ls1046afrwy/Kconfig" 2434source "board/freescale/ls1012aqds/Kconfig" 2435source "board/freescale/ls1012ardb/Kconfig" 2436source "board/freescale/ls1012afrdm/Kconfig" 2437source "board/freescale/lx2160a/Kconfig" 2438source "board/grinn/chiliboard/Kconfig" 2439source "board/hisilicon/hikey/Kconfig" 2440source "board/hisilicon/hikey960/Kconfig" 2441source "board/hisilicon/poplar/Kconfig" 2442source "board/isee/igep003x/Kconfig" 2443source "board/kontron/sl28/Kconfig" 2444source "board/myir/mys_6ulx/Kconfig" 2445source "board/samsung/common/Kconfig" 2446source "board/siemens/common/Kconfig" 2447source "board/seeed/npi_imx6ull/Kconfig" 2448source "board/socionext/developerbox/Kconfig" 2449source "board/tcl/sl50/Kconfig" 2450source "board/traverse/ten64/Kconfig" 2451source "board/variscite/dart_6ul/Kconfig" 2452source "board/vscom/baltos/Kconfig" 2453source "board/phytium/durian/Kconfig" 2454source "board/phytium/pomelo/Kconfig" 2455source "board/phytium/pe2201/Kconfig" 2456source "board/xen/xenguest_arm64/Kconfig" 2457 2458source "arch/arm/Kconfig.debug" 2459 2460endmenu 2461