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Searched defs:_shift (Results 1 – 23 of 23) sorted by relevance

/drivers/clk/mediatek/
A Dclk-mt7987.c333 _shift, _width, _gate, _upd_ofs, _upd) \ argument
538 #define INFRA_MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
600 #define GATE_INFRA0_INFRA(_id, _name, _parent, _shift) \ argument
602 #define GATE_INFRA0_TOP(_id, _name, _parent, _shift) \ argument
611 #define GATE_INFRA1_INFRA(_id, _name, _parent, _shift) \ argument
613 #define GATE_INFRA1_TOP(_id, _name, _parent, _shift) \ argument
622 #define GATE_INFRA2_INFRA(_id, _name, _parent, _shift) \ argument
624 #define GATE_INFRA2_TOP(_id, _name, _parent, _shift) \ argument
633 #define GATE_INFRA3_INFRA(_id, _name, _parent, _shift) \ argument
635 #define GATE_INFRA3_TOP(_id, _name, _parent, _shift) \ argument
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A Dclk-mt7988.c277 _shift, _width, _gate, _upd_ofs, _upd) \ argument
483 #define INFRA_MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
569 #define GATE_INFRA0_INFRA(_id, _name, _parent, _shift) \ argument
571 #define GATE_INFRA0_TOP(_id, _name, _parent, _shift) \ argument
580 #define GATE_INFRA1_INFRA(_id, _name, _parent, _shift) \ argument
582 #define GATE_INFRA1_TOP(_id, _name, _parent, _shift) \ argument
591 #define GATE_INFRA2_INFRA(_id, _name, _parent, _shift) \ argument
593 #define GATE_INFRA2_TOP(_id, _name, _parent, _shift) \ argument
602 #define GATE_INFRA3_INFRA(_id, _name, _parent, _shift) \ argument
604 #define GATE_INFRA3_TOP(_id, _name, _parent, _shift) \ argument
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A Dclk-mt7981.c232 _shift, _width, _gate, _upd_ofs, _upd) \ argument
357 #define INFRA_MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
411 #define GATE_INFRA0(_id, _name, _parent, _shift, _flags) \ argument
417 #define GATE_INFRA0_INFRA(_id, _name, _parent, _shift) \ argument
419 #define GATE_INFRA0_TOP(_id, _name, _parent, _shift) \ argument
422 #define GATE_INFRA1(_id, _name, _parent, _shift, _flags) \ argument
428 #define GATE_INFRA1_INFRA(_id, _name, _parent, _shift) \ argument
430 #define GATE_INFRA1_TOP(_id, _name, _parent, _shift) \ argument
433 #define GATE_INFRA2(_id, _name, _parent, _shift, _flags) \ argument
439 #define GATE_INFRA2_INFRA(_id, _name, _parent, _shift) \ argument
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A Dclk-mt7986.c228 _shift, _width, _gate, _upd_ofs, _upd) \ argument
364 #define INFRA_MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
417 #define GATE_INFRA0(_id, _name, _parent, _shift, _flags) \ argument
423 #define GATE_INFRA0_INFRA(_id, _name, _parent, _shift) \ argument
425 #define GATE_INFRA0_TOP(_id, _name, _parent, _shift) \ argument
428 #define GATE_INFRA1(_id, _name, _parent, _shift, _flags) \ argument
434 #define GATE_INFRA1_INFRA(_id, _name, _parent, _shift) \ argument
436 #define GATE_INFRA1_TOP(_id, _name, _parent, _shift) \ argument
439 #define GATE_INFRA2(_id, _name, _parent, _shift, _flags) \ argument
445 #define GATE_INFRA2_INFRA(_id, _name, _parent, _shift) \ argument
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A Dclk-mt8518.c1300 #define GATE_TOP0(_id, _parent, _shift) { \ argument
1308 #define GATE_TOP1(_id, _parent, _shift) { \ argument
1316 #define GATE_TOP2(_id, _parent, _shift) { \ argument
1324 #define GATE_TOP2_I(_id, _parent, _shift) { \ argument
1332 #define GATE_TOP3(_id, _parent, _shift) { \ argument
1340 #define GATE_TOP4(_id, _parent, _shift) { \ argument
1348 #define GATE_TOP5(_id, _parent, _shift) { \ argument
1356 #define GATE_TOP5_I(_id, _parent, _shift) { \ argument
1364 #define GATE_TOP6(_id, _parent, _shift) { \ argument
1372 #define GATE_TOP7(_id, _parent, _shift) { \ argument
A Dclk-mt8365.c510 #define GATE_TOP0(_id, _parent, _shift) { \ argument
518 #define GATE_TOP1(_id, _parent, _shift) { \ argument
526 #define GATE_TOP2(_id, _parent, _shift) { \ argument
587 #define GATE_IFRX(_id, _parent, _shift, _regs) \ argument
596 #define GATE_IFR2(_id, _parent, _shift) \ argument
599 #define GATE_IFR3(_id, _parent, _shift) \ argument
602 #define GATE_IFR4(_id, _parent, _shift) \ argument
605 #define GATE_IFR5(_id, _parent, _shift) \ argument
608 #define GATE_IFR6(_id, _parent, _shift) \ argument
A Dclk-mt7622.c75 #define GATE_APMIXED(_id, _parent, _shift) { \ argument
407 #define GATE_INFRA(_id, _parent, _shift) { \ argument
430 #define PERI_MUX(_id, _parents, _reg, _shift, _width) \ argument
449 #define GATE_PERI0_FLAGS(_id, _parent, _shift, _flags) { \ argument
456 #define GATE_PERI0(_id, _parent, _shift) \ argument
458 #define GATE_PERI0_XTAL(_id, _parent, _shift) \ argument
461 #define GATE_PERI1(_id, _parent, _shift) { \ argument
511 #define GATE_PCIE(_id, _parent, _shift) { \ argument
544 #define GATE_ETH(_id, _parent, _shift) { \ argument
564 #define GATE_SGMII(_id, _parent, _shift) { \ argument
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A Dclk-mt7623.c775 #define GATE_INFRA_FLAGS(_id, _parent, _shift, _flags) { \ argument
782 #define GATE_INFRA(_id, _parent, _shift) \ argument
784 #define GATE_INFRA_XTAL(_id, _parent, _shift) \ argument
890 #define GATE_PERI0_FLAGS(_id, _parent, _shift, _flags) { \ argument
897 #define GATE_PERI0(_id, _parent, _shift) \ argument
899 #define GATE_PERI0_XTAL(_id, _parent, _shift) \ argument
902 #define GATE_PERI1(_id, _parent, _shift) { \ argument
963 #define GATE_ETH_HIF(_id, _parent, _shift, _flag) { \ argument
971 #define GATE_ETH_HIF0(_id, _parent, _shift) \ argument
974 #define GATE_ETH_HIF1(_id, _parent, _shift) \ argument
A Dclk-mt8512.c610 #define GATE_TOP0(_id, _parent, _shift) { \ argument
618 #define GATE_TOP1(_id, _parent, _shift) { \ argument
675 #define GATE_INFRA0(_id, _parent, _shift) { \ argument
683 #define GATE_INFRA1(_id, _parent, _shift) { \ argument
691 #define GATE_INFRA2(_id, _parent, _shift) { \ argument
699 #define GATE_INFRA3(_id, _parent, _shift) { \ argument
707 #define GATE_INFRA4(_id, _parent, _shift) { \ argument
715 #define GATE_INFRA5(_id, _parent, _shift) { \ argument
A Dclk-mt8516.c577 #define GATE_TOP0(_id, _parent, _shift) { \ argument
585 #define GATE_TOP1(_id, _parent, _shift) { \ argument
593 #define GATE_TOP2(_id, _parent, _shift) { \ argument
601 #define GATE_TOP2_I(_id, _parent, _shift) { \ argument
609 #define GATE_TOP3(_id, _parent, _shift) { \ argument
617 #define GATE_TOP4_I(_id, _parent, _shift) { \ argument
625 #define GATE_TOP5(_id, _parent, _shift) { \ argument
A Dclk-mt7629.c426 #define GATE_INFRA(_id, _parent, _shift) { \ argument
455 #define GATE_PERI0(_id, _parent, _shift) { \ argument
463 #define GATE_PERI1(_id, _parent, _shift) { \ argument
500 #define GATE_ETH(_id, _parent, _shift, _flag) { \ argument
508 #define GATE_ETH0(_id, _parent, _shift) \ argument
511 #define GATE_ETH1(_id, _parent, _shift) \ argument
528 #define GATE_SGMII(_id, _parent, _shift) { \ argument
549 #define GATE_SSUSB(_id, _parent, _shift) { \ argument
A Dclk-mt8183.c628 #define GATE_INFRA0(_id, _parent, _shift) { \ argument
636 #define GATE_INFRA1(_id, _parent, _shift) { \ argument
644 #define GATE_INFRA2(_id, _parent, _shift) { \ argument
652 #define GATE_INFRA3(_id, _parent, _shift) { \ argument
A Dclk-mtk.h166 #define MUX_GATE_FLAGS(_id, _parents, _reg, _shift, _width, _gate, \ argument
179 #define MUX_GATE(_id, _parents, _reg, _shift, _width, _gate) \ argument
182 #define MUX_MIXED_FLAGS(_id, _parents, _reg, _shift, _width, _flags) { \ argument
192 #define MUX_MIXED(_id, _parents, _reg, _shift, _width) \ argument
195 #define MUX_FLAGS(_id, _parents, _reg, _shift, _width, _flags) { \ argument
205 #define MUX(_id, _parents, _reg, _shift, _width) \ argument
209 _mux_clr_ofs, _shift, _width, _gate, \ argument
/drivers/clk/sophgo/
A Dclk-common.h28 #define CV1800B_CLK_REGBIT(_offset, _shift) \ argument
34 #define CV1800B_CLK_REGFIELD(_offset, _shift, _width) \ argument
/drivers/pinctrl/mtmips/
A Dpinctrl-mtmips-common.h43 #define GRP(_name, _funcs, _reg, _shift, _mask) \ argument
47 #define GRP_PCONF(_name, _funcs, _reg, _shift, _mask, _pconf_reg, _pconf_shift) \ argument
/drivers/clk/meson/
A Da1.c105 #define CLK_MUX(_name, _reg, _shift, _width, ...) \ argument
118 #define CLK_DIV(_name, _reg, _shift, _width, _parent) \ argument
148 #define CLK_GATE(_name, _reg, _shift, _parent) \ argument
/drivers/clk/microchip/
A Dmpfs_clk_cfg.c104 #define CLK_CFG(_id, _name, _shift, _width, _table, _flags) { \ argument
A Dmpfs_clk_msspll.c76 #define CLK_PLL(_id, _name, _shift, _width, _reg_offset, _flags) { \ argument
A Dmpfs_clk_periph.c107 #define CLK_PERIPH(_id, _name, _parent_id, _shift, _flags) { \ argument
/drivers/clk/
A Dclk_k210.c121 #define DIV(id, _off, _shift, _width, _type) \ argument
251 #define MUX_PARENTS(id, _off, _shift, _width, ...) \ argument
279 #define PLL(_off, _shift, _width) { \ argument
/drivers/clk/thead/
A Dclk-th1520-ap.c73 #define TH_CCU_ARG(_shift, _width) \ argument
79 #define TH_CCU_DIV_FLAGS(_shift, _width, _flags) \ argument
/drivers/clk/stm32/
A Dclk-stm32mp25.c105 #define MUX_CFG(id, src, _offset, _shift, _witdh)[id] = {\ argument
A Dclk-stm32mp13.c149 #define MUX_CFG(id, src, _offset, _shift, _witdh) \ argument
449 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table) \ argument

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