1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2010 - 2011 NVIDIA Corporation <www.nvidia.com>
5 */
6
7 #include <dm.h>
8 #include <log.h>
9 #include <linux/errno.h>
10 #include <asm/arch-tegra/crypto.h>
11 #include "uboot_aes.h"
12
sign_data_block(u8 * source,unsigned int length,u8 * signature)13 int sign_data_block(u8 *source, unsigned int length, u8 *signature)
14 {
15 struct udevice *dev;
16 int ret;
17
18 /* Only one AES engine should be present */
19 ret = uclass_get_device(UCLASS_AES, 0, &dev);
20 if (ret) {
21 log_err("%s: failed to get tegra_aes: %d\n", __func__, ret);
22 return ret;
23 }
24
25 ret = dm_aes_select_key_slot(dev, 128, TEGRA_AES_SLOT_SBK);
26 if (ret)
27 return ret;
28
29 return dm_aes_cmac(dev, source, signature,
30 DIV_ROUND_UP(length, AES_BLOCK_LENGTH));
31 }
32
encrypt_data_block(u8 * source,u8 * dest,unsigned int length)33 int encrypt_data_block(u8 *source, u8 *dest, unsigned int length)
34 {
35 struct udevice *dev;
36 int ret;
37
38 /* Only one AES engine should be present */
39 ret = uclass_get_device(UCLASS_AES, 0, &dev);
40 if (ret) {
41 log_err("%s: failed to get tegra_aes: %d\n", __func__, ret);
42 return ret;
43 }
44
45 ret = dm_aes_select_key_slot(dev, 128, TEGRA_AES_SLOT_SBK);
46 if (ret)
47 return ret;
48
49 return dm_aes_cbc_encrypt(dev, (u8 *)AES_ZERO_BLOCK, source, dest,
50 DIV_ROUND_UP(length, AES_BLOCK_LENGTH));
51 }
52
decrypt_data_block(u8 * source,u8 * dest,unsigned int length)53 int decrypt_data_block(u8 *source, u8 *dest, unsigned int length)
54 {
55 struct udevice *dev;
56 int ret;
57
58 /* Only one AES engine should be present */
59 ret = uclass_get_device(UCLASS_AES, 0, &dev);
60 if (ret) {
61 log_err("%s: failed to get tegra_aes: %d\n", __func__, ret);
62 return ret;
63 }
64
65 ret = dm_aes_select_key_slot(dev, 128, TEGRA_AES_SLOT_SBK);
66 if (ret)
67 return ret;
68
69 return dm_aes_cbc_decrypt(dev, (u8 *)AES_ZERO_BLOCK, source, dest,
70 DIV_ROUND_UP(length, AES_BLOCK_LENGTH));
71 }
72