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Searched defs:div1 (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/
A Dclk_zynq.c229 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
246 u32 div1 = 1; in zynq_clk_get_peripheral_rate() local
291 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs()
320 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
A Dclk_zynqmp.c499 u32 div1 = 1; in zynqmp_clk_get_peripheral_rate() local
539 u32 div1 = 1; in zynqmp_clk_get_crf_crl_rate() local
616 u32 *div0, u32 *div1) in zynqmp_clk_calc_peripheral_two_divs()
645 u32 clk_ctrl, div0 = 0, div1 = 0; in zynqmp_clk_set_peripheral_rate() local
/drivers/clk/imx/
A Dclk-composite-8m.c61 int div1, div2; in imx8m_clk_composite_compute_dividers() local

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