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Searched defs:dram_info (Results 1 – 23 of 23) sorted by relevance

/drivers/ddr/marvell/axp/
A Dddr3_hw_training.h252 u32 num_cs;
253 u32 cs_ena;
261 u32 rl_max_phase;
262 u32 rl_min_phase;
265 u32 rd_smpl_dly;
266 u32 rd_rdy_dly;
267 u32 cl;
268 u32 cwl;
269 u32 mode_2t;
270 int rl400_bug;
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A Dddr3_hw_training.c85 MV_DRAM_INFO dram_info; in ddr3_hw_training() local
485 void ddr3_set_performance_params(MV_DRAM_INFO *dram_info) in ddr3_set_performance_params()
620 int ddr3_load_patterns(MV_DRAM_INFO *dram_info, int resume) in ddr3_load_patterns()
696 void ddr3_save_training(MV_DRAM_INFO *dram_info) in ddr3_save_training()
870 int ddr3_check_if_resume_mode(MV_DRAM_INFO *dram_info, u32 freq) in ddr3_check_if_resume_mode()
914 int ddr3_training_suspend_resume(MV_DRAM_INFO *dram_info) in ddr3_training_suspend_resume()
1046 int ddr3_get_min_max_rl_phase(MV_DRAM_INFO *dram_info, u32 *min, u32 *max, in ddr3_get_min_max_rl_phase()
1086 int ddr3_odt_read_dynamic_config(MV_DRAM_INFO *dram_info) in ddr3_odt_read_dynamic_config()
A Dddr3_dqs.c92 static u32 *ddr3_dqs_choose_pattern(MV_DRAM_INFO *dram_info, u32 victim_dq) in ddr3_dqs_choose_pattern()
130 int ddr3_dqs_centralization_rx(MV_DRAM_INFO *dram_info) in ddr3_dqs_centralization_rx()
212 int ddr3_dqs_centralization_tx(MV_DRAM_INFO *dram_info) in ddr3_dqs_centralization_tx()
295 int ddr3_find_adll_limits(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, int is_tx) in ddr3_find_adll_limits()
886 static int ddr3_center_calc(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, in ddr3_center_calc()
951 int ddr3_special_pattern_i_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, in ddr3_special_pattern_i_search()
1112 int ddr3_special_pattern_ii_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, in ddr3_special_pattern_ii_search()
1261 int ddr3_set_dqs_centralization_results(MV_DRAM_INFO *dram_info, u32 cs, in ddr3_set_dqs_centralization_results()
1327 int ddr3_load_dqs_patterns(MV_DRAM_INFO *dram_info) in ddr3_load_dqs_patterns()
A Dddr3_pbs.c75 int ddr3_pbs_tx(MV_DRAM_INFO *dram_info) in ddr3_pbs_tx()
404 static int ddr3_tx_shift_dqs_adll_step_before_fail(MV_DRAM_INFO *dram_info, in ddr3_tx_shift_dqs_adll_step_before_fail()
519 int ddr3_pbs_rx(MV_DRAM_INFO *dram_info) in ddr3_pbs_rx()
916 static int ddr3_rx_shift_dqs_to_first_fail(MV_DRAM_INFO *dram_info, u32 cur_pup, in ddr3_rx_shift_dqs_to_first_fail()
1136 static int ddr3_pbs_per_bit(MV_DRAM_INFO *dram_info, int *start_over, int is_tx, in ddr3_pbs_per_bit()
1416 static int ddr3_set_pbs_results(MV_DRAM_INFO *dram_info, int is_tx) in ddr3_set_pbs_results()
1530 int ddr3_load_pbs_patterns(MV_DRAM_INFO *dram_info) in ddr3_load_pbs_patterns()
A Dddr3_write_leveling.c65 int ddr3_write_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_write_leveling_hw()
185 int ddr3_wl_supplement(MV_DRAM_INFO *dram_info) in ddr3_wl_supplement()
473 int ddr3_write_leveling_hw_reg_dimm(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_write_leveling_hw_reg_dimm()
658 int ddr3_write_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) in ddr3_write_leveling_sw()
883 MV_DRAM_INFO *dram_info) in ddr3_write_leveling_sw_reg_dimm()
1126 u32 *result, MV_DRAM_INFO *dram_info) in ddr3_write_leveling_single_cs()
A Dddr3_sdram.c162 int ddr3_sdram_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_compare()
218 int ddr3_sdram_dm_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_dm_compare()
279 int ddr3_sdram_pbs_compare(MV_DRAM_INFO *dram_info, u32 pup_locked, in ddr3_sdram_pbs_compare()
440 int ddr3_sdram_direct_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_direct_compare()
598 int ddr3_sdram_dqs_compare(MV_DRAM_INFO *dram_info, u32 unlock_pup, in ddr3_sdram_dqs_compare()
A Dddr3_read_leveling.c61 int ddr3_read_leveling_hw(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_read_leveling_hw()
179 int ddr3_read_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) in ddr3_read_leveling_sw()
401 MV_DRAM_INFO *dram_info) in ddr3_read_leveling_single_cs_rl_mode()
753 MV_DRAM_INFO *dram_info) in ddr3_read_leveling_single_cs_window_mode()
A Dddr3_dfs.c112 int ddr3_dfs_high_2_low(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_dfs_high_2_low()
768 int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) in ddr3_dfs_low_2_high()
A Dxor.c23 void mv_sys_xor_init(MV_DRAM_INFO *dram_info) in mv_sys_xor_init()
/drivers/ram/rockchip/
A Dsdram_rk3308.c14 struct dram_info { struct
21 struct dram_info *priv = dev_get_priv(dev); in rk3308_dmc_probe() argument
A Dsdram_rk3128.c15 struct dram_info { struct
22 struct dram_info *priv = dev_get_priv(dev); in rk3128_dmc_probe() argument
A Dsdram_rk3568.c14 struct dram_info { struct
21 struct dram_info *priv = dev_get_priv(dev); in rk3568_dmc_probe() argument
A Dsdram_rk3588.c14 struct dram_info { struct
21 struct dram_info *priv = dev_get_priv(dev); in rk3588_dmc_probe() argument
A Dsdram_px30.c21 struct dram_info { struct
23 struct ddr_pctl_regs *pctl;
24 struct ddr_phy_regs *phy;
25 struct px30_cru *cru;
26 struct msch_regs *msch;
27 struct px30_ddr_grf_regs *ddr_grf;
28 struct px30_grf *grf;
30 struct ram_info info;
31 struct px30_pmugrf *pmugrf;
124 struct dram_info dram_info; variable
A Dsdram_rk3328.c24 struct dram_info { struct
26 struct ddr_pctl_regs *pctl;
27 struct ddr_phy_regs *phy;
28 struct clk ddr_clk;
29 struct rk3328_cru *cru;
30 struct msch_regs *msch;
31 struct rk3328_ddr_grf_regs *ddr_grf;
33 struct ram_info info;
34 struct rk3328_grf_regs *grf;
A Ddmc-rk3368.c28 struct dram_info { struct
29 struct ram_info info;
30 struct clk ddr_clk;
31 struct rk3368_cru *cru;
32 struct rk3368_grf *grf;
33 struct rk3368_ddr_pctl *pctl;
34 struct rk3368_ddrphy *phy;
35 struct rk3368_pmu_grf *pmugrf;
36 struct rk3368_msch *msch;
A Dsdram_rk3288.c39 struct dram_info { struct
40 struct chan_info chan[2];
41 struct ram_info info;
42 struct clk ddr_clk;
43 struct rockchip_cru *cru;
44 struct rk3288_grf *grf;
45 struct rk3288_sgrf *sgrf;
46 struct rk3288_pmu *pmu;
47 bool is_veyron;
A Dsdram_rk322x.c33 struct dram_info { struct
34 struct chan_info chan[1];
35 struct ram_info info;
36 struct clk ddr_clk;
37 struct rk322x_cru *cru;
38 struct rk322x_grf *grf;
A Dsdram_rk3188.c37 struct dram_info { struct
38 struct chan_info chan[1];
39 struct ram_info info;
40 struct clk ddr_clk;
41 struct rk3188_cru *cru;
42 struct rk3188_grf *grf;
43 struct rk3188_sgrf *sgrf;
44 struct rk3188_pmu *pmu;
A Dsdram_rk3399.c66 struct dram_info { struct
82 int (*data_training_first)(struct dram_info *dram, u32 channel, u8 rank, argument
A Dsdram_rv1126.c35 struct dram_info { struct
38 void __iomem *pctl;
39 void __iomem *phy;
40 struct rv1126_cru *cru;
41 struct msch_regs *msch;
42 struct rv1126_ddrgrf *ddrgrf;
43 struct rv1126_grf *grf;
67 struct dram_info dram_info; variable
/drivers/ram/aspeed/
A Dsdram_ast2500.c68 struct dram_info { struct
69 struct ram_info info;
70 struct clk ddr_clk;
71 struct ast2500_sdrammc_regs *regs;
95 static void ast2500_ddr_phy_init_process(struct dram_info *info) in ast2500_ddr_phy_init_process() argument
A Dsdram_ast2600.c543 struct dram_info { struct
554 static void ast2600_sdramphy_kick_training(struct dram_info *info) in ast2600_sdramphy_kick_training() argument

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