1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2012 Stephen Warren
4 */
5
6 #include <memalign.h>
7 #include <phys2bus.h>
8 #include <asm/arch/mbox.h>
9 #include <linux/delay.h>
10
11 struct msg_set_power_state {
12 struct bcm2835_mbox_hdr hdr;
13 struct bcm2835_mbox_tag_set_power_state set_power_state;
14 u32 end_tag;
15 };
16
17 struct msg_get_clock_rate {
18 struct bcm2835_mbox_hdr hdr;
19 struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
20 u32 end_tag;
21 };
22
23 struct msg_set_sdhost_clock {
24 struct bcm2835_mbox_hdr hdr;
25 struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock;
26 u32 end_tag;
27 };
28
29 struct msg_query {
30 struct bcm2835_mbox_hdr hdr;
31 struct bcm2835_mbox_tag_physical_w_h physical_w_h;
32 u32 end_tag;
33 };
34
35 struct msg_setup {
36 struct bcm2835_mbox_hdr hdr;
37 struct bcm2835_mbox_tag_physical_w_h physical_w_h;
38 struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
39 struct bcm2835_mbox_tag_depth depth;
40 struct bcm2835_mbox_tag_pixel_order pixel_order;
41 struct bcm2835_mbox_tag_alpha_mode alpha_mode;
42 struct bcm2835_mbox_tag_virtual_offset virtual_offset;
43 struct bcm2835_mbox_tag_overscan overscan;
44 struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
45 struct bcm2835_mbox_tag_pitch pitch;
46 u32 end_tag;
47 };
48
49 struct msg_notify_vl805_reset {
50 struct bcm2835_mbox_hdr hdr;
51 struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
52 u32 end_tag;
53 };
54
bcm2835_power_on_module(u32 module)55 int bcm2835_power_on_module(u32 module)
56 {
57 ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
58 int ret;
59
60 BCM2835_MBOX_INIT_HDR(msg_pwr);
61 BCM2835_MBOX_INIT_TAG(&msg_pwr->set_power_state,
62 SET_POWER_STATE);
63 msg_pwr->set_power_state.body.req.device_id = module;
64 msg_pwr->set_power_state.body.req.state =
65 BCM2835_MBOX_SET_POWER_STATE_REQ_ON |
66 BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT;
67
68 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
69 &msg_pwr->hdr);
70 if (ret) {
71 printf("bcm2835: Could not set module %u power state\n",
72 module);
73 return -EIO;
74 }
75
76 return 0;
77 }
78
bcm2835_get_mmc_clock(u32 clock_id)79 int bcm2835_get_mmc_clock(u32 clock_id)
80 {
81 ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
82 int ret;
83 u32 clock_rate = 0;
84
85 ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
86 if (ret)
87 return ret;
88
89 BCM2835_MBOX_INIT_HDR(msg_clk);
90 BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
91 msg_clk->get_clock_rate.body.req.clock_id = clock_id;
92
93 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
94 if (ret) {
95 printf("bcm2835: Could not query eMMC clock rate\n");
96 return -EIO;
97 }
98
99 clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
100
101 if (clock_rate == 0) {
102 BCM2835_MBOX_INIT_HDR(msg_clk);
103 BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE);
104 msg_clk->get_clock_rate.body.req.clock_id = clock_id;
105
106 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
107 if (ret) {
108 printf("bcm2835: Could not query max eMMC clock rate\n");
109 return -EIO;
110 }
111
112 clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
113 }
114
115 return clock_rate;
116 }
117
bcm2835_set_sdhost_clock(u32 rate_hz,u32 * rate_1,u32 * rate_2)118 int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2)
119 {
120 ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1);
121 int ret;
122
123 BCM2835_MBOX_INIT_HDR(msg_sdhost_clk);
124 BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK);
125
126 msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz;
127
128 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr);
129 if (ret) {
130 printf("bcm2835: Could not query sdhost clock rate\n");
131 return -EIO;
132 }
133
134 *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1;
135 *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2;
136
137 return 0;
138 }
139
bcm2835_get_video_size(int * widthp,int * heightp)140 int bcm2835_get_video_size(int *widthp, int *heightp)
141 {
142 ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
143 int ret;
144
145 BCM2835_MBOX_INIT_HDR(msg_query);
146 BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
147 GET_PHYSICAL_W_H);
148 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
149 if (ret) {
150 printf("bcm2835: Could not query display resolution\n");
151 return ret;
152 }
153 *widthp = msg_query->physical_w_h.body.resp.width;
154 *heightp = msg_query->physical_w_h.body.resp.height;
155
156 return 0;
157 }
158
bcm2835_set_video_params(int * widthp,int * heightp,int depth_bpp,int pixel_order,int alpha_mode,ulong * fb_basep,ulong * fb_sizep,int * pitchp)159 int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
160 int pixel_order, int alpha_mode, ulong *fb_basep,
161 ulong *fb_sizep, int *pitchp)
162 {
163 ALLOC_CACHE_ALIGN_BUFFER(struct msg_setup, msg_setup, 1);
164 int ret;
165
166 BCM2835_MBOX_INIT_HDR(msg_setup);
167 BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
168 msg_setup->physical_w_h.body.req.width = *widthp;
169 msg_setup->physical_w_h.body.req.height = *heightp;
170 BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
171 msg_setup->virtual_w_h.body.req.width = *widthp;
172 msg_setup->virtual_w_h.body.req.height = *heightp;
173 BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
174 msg_setup->depth.body.req.bpp = 32;
175 BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
176 msg_setup->pixel_order.body.req.order = pixel_order;
177 BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
178 msg_setup->alpha_mode.body.req.alpha = alpha_mode;
179 BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
180 msg_setup->virtual_offset.body.req.x = 0;
181 msg_setup->virtual_offset.body.req.y = 0;
182 BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
183 msg_setup->overscan.body.req.top = 0;
184 msg_setup->overscan.body.req.bottom = 0;
185 msg_setup->overscan.body.req.left = 0;
186 msg_setup->overscan.body.req.right = 0;
187 BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
188 msg_setup->allocate_buffer.body.req.alignment = 0x100;
189 BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_setup->pitch, GET_PITCH);
190
191 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
192 if (ret) {
193 printf("bcm2835: Could not configure display\n");
194 return ret;
195 }
196 *widthp = msg_setup->physical_w_h.body.resp.width;
197 *heightp = msg_setup->physical_w_h.body.resp.height;
198 *pitchp = msg_setup->pitch.body.resp.pitch;
199 *fb_basep = bus_to_phys(
200 msg_setup->allocate_buffer.body.resp.fb_address);
201 *fb_sizep = msg_setup->allocate_buffer.body.resp.fb_size;
202
203 return 0;
204 }
205
206 /*
207 * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
208 * may either be loaded directly from an EEPROM or, if not present, by the
209 * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
210 * loaded.
211 */
bcm2711_notify_vl805_reset(void)212 int bcm2711_notify_vl805_reset(void)
213 {
214 ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
215 msg_notify_vl805_reset, 1);
216 int ret;
217 static int done = false;
218
219 if (done)
220 return 0;
221
222 done = true;
223
224 BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
225 BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
226 NOTIFY_XHCI_RESET);
227
228 /*
229 * The pci device address is expected like this:
230 *
231 * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
232 *
233 * But since RPi4's PCIe setup is hardwired, we know the address in
234 * advance.
235 */
236 msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
237
238 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
239 &msg_notify_vl805_reset->hdr);
240 if (ret) {
241 printf("bcm2711: Failed to load vl805's firmware, %d\n", ret);
242 return -EIO;
243 }
244
245 udelay(200);
246
247 return 0;
248 }
249