Searched defs:mr (Results 1 – 25 of 31) sorted by relevance
12
485 static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start, in get_owned_memreg()522 sc_rm_mr_t mr; in get_effective_memsize() local559 sc_rm_mr_t mr; in dram_init() local626 sc_rm_mr_t mr; in dram_init_banksize() local732 sc_rm_mr_t mr; in enable_caches() local
60 sc_rm_mr_t mr; in ahab_verify_cntr_image() local
16 u32 mr; /* 0x00 Mode Register */ member
24 u32 mr; /* Reset Controller Mode Register */ member
31 u32 mr; /* 0x00 SDRAMC Mode Register */ member63 u32 mr; /* 0x00 SDRAMC Mode Register */ member
29 u32 mr; member
14 u32 mr; member31 u32 mr; /* 0x00: Mode Register */ member
19 u32 mr; /* 0x04 Mode Register */ member
30 u32 mr; member
73 struct packet_mreq mr; in _raw_packet_start() local
15 uint mr; /* DMA mode register */ member49 uint mr; /* DMA mode register */ member
43 u32 mr; in get_mr() local
19 u32 mr[4]; /* Match Registers */ member
14 u32 mr; /* 0x00 MDHA Mode */ member
14 u16 mr; /* 0x00 Mode */ member
13 u32 mr; /* 0x00 Mode */ member
62 u32 mr; in get_mr() local1117 u32 mr = 0, temp; in is_lpddr2_sdram_present() local
79 u32 mr[4]; member
46 #define MCR30_SET_MR(mr) ((mr << MCR30_MODE_REG_SEL_SHIFT) | MCR30_SET_MODE_REG) argument
362 u16 mr[4] = { 0, }; in mctl_channel_init() local
40 u32 mr; /* 0x1f0 mode register */ member
90 u32 mr[4]; /* 0x30 mode registers */ member
191 u16 mr; /* 0x02 Modulus */ member
215 u16 mr; /* 0x02 Modulus register */ member
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