1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
4 *
5 * Copyright (C) 2014 Google Inc.
6 * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
7 */
8
9 #define LOG_CATEGORY UCLASS_RAM
10
11 #include <dm.h>
12 #include <errno.h>
13 #include <fdtdec.h>
14 #include <log.h>
15 #include <malloc.h>
16 #include <net.h>
17 #include <spi.h>
18 #include <spi_flash.h>
19 #include <asm/global_data.h>
20 #include <asm/mrccache.h>
21 #include <dm/device-internal.h>
22 #include <dm/uclass-internal.h>
23
24 DECLARE_GLOBAL_DATA_PTR;
25
mrc_block_size(uint data_size)26 static uint mrc_block_size(uint data_size)
27 {
28 uint mrc_size = sizeof(struct mrc_data_container) + data_size;
29
30 return ALIGN(mrc_size, MRC_DATA_ALIGN);
31 }
32
next_mrc_block(struct mrc_data_container * cache)33 static struct mrc_data_container *next_mrc_block(
34 struct mrc_data_container *cache)
35 {
36 /* MRC data blocks are aligned within the region */
37 u8 *region_ptr = (u8 *)cache;
38
39 region_ptr += mrc_block_size(cache->data_size);
40
41 return (struct mrc_data_container *)region_ptr;
42 }
43
is_mrc_cache(struct mrc_data_container * cache)44 static int is_mrc_cache(struct mrc_data_container *cache)
45 {
46 return cache && (cache->signature == MRC_DATA_SIGNATURE);
47 }
48
mrccache_find_current(struct mrc_region * entry)49 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
50 {
51 struct mrc_data_container *cache, *next;
52 ulong base_addr, end_addr;
53 uint id;
54
55 base_addr = entry->base + entry->offset;
56 end_addr = base_addr + entry->length;
57 cache = NULL;
58
59 /* Search for the last filled entry in the region */
60 for (id = 0, next = (struct mrc_data_container *)base_addr;
61 is_mrc_cache(next);
62 id++) {
63 cache = next;
64 next = next_mrc_block(next);
65 if ((ulong)next >= end_addr)
66 break;
67 }
68
69 if (id-- == 0) {
70 debug("%s: No valid MRC cache found.\n", __func__);
71 return NULL;
72 }
73
74 /* Verify checksum */
75 if (cache->checksum != compute_ip_checksum(cache->data,
76 cache->data_size)) {
77 printf("%s: MRC cache checksum mismatch\n", __func__);
78 return NULL;
79 }
80
81 debug("%s: picked entry %u from cache block\n", __func__, id);
82
83 return cache;
84 }
85
86 /**
87 * find_next_mrc_cache() - get next cache entry
88 *
89 * This moves to the next cache entry in the region, making sure it has enough
90 * space to hold data of size @data_size.
91 *
92 * @entry: MRC cache flash area
93 * @cache: Entry to start from
94 * @data_size: Required data size of the new entry. Note that we assume that
95 * all cache entries are the same size
96 *
97 * Return: next cache entry if found, NULL if we got to the end
98 */
find_next_mrc_cache(struct mrc_region * entry,struct mrc_data_container * prev,int data_size)99 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
100 struct mrc_data_container *prev, int data_size)
101 {
102 struct mrc_data_container *cache;
103 ulong base_addr, end_addr;
104
105 base_addr = entry->base + entry->offset;
106 end_addr = base_addr + entry->length;
107
108 /*
109 * We assume that all cache entries are the same size, but let's use
110 * data_size here for clarity.
111 */
112 cache = next_mrc_block(prev);
113 if ((ulong)cache + mrc_block_size(data_size) > end_addr) {
114 /* Crossed the boundary */
115 cache = NULL;
116 debug("%s: no available entries found\n", __func__);
117 } else {
118 debug("%s: picked next entry from cache block at %p\n",
119 __func__, cache);
120 }
121
122 return cache;
123 }
124
125 /**
126 * mrccache_update() - update the MRC cache with a new record
127 *
128 * This writes a new record to the end of the MRC cache region. If the new
129 * record is the same as the latest record then the write is skipped
130 *
131 * @sf: SPI flash to write to
132 * @entry: Position and size of MRC cache in SPI flash
133 * @cur: Record to write
134 * Return: 0 if updated, -EEXIST if the record is the same as the latest
135 * record, -EINVAL if the record is not valid, other error if SPI write failed
136 */
mrccache_update(struct udevice * sf,struct mrc_region * entry,struct mrc_data_container * cur)137 static int mrccache_update(struct udevice *sf, struct mrc_region *entry,
138 struct mrc_data_container *cur)
139 {
140 struct mrc_data_container *cache;
141 ulong offset;
142 ulong base_addr;
143 int ret;
144
145 if (!is_mrc_cache(cur)) {
146 debug("%s: Cache data not valid\n", __func__);
147 return -EINVAL;
148 }
149
150 /* Find the last used block */
151 base_addr = entry->base + entry->offset;
152 debug("Updating MRC cache data\n");
153 cache = mrccache_find_current(entry);
154 if (cache && (cache->data_size == cur->data_size) &&
155 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
156 debug("MRC data in flash is up to date. No update\n");
157 return -EEXIST;
158 }
159
160 /* Move to the next block, which will be the first unused block */
161 if (cache)
162 cache = find_next_mrc_cache(entry, cache, cur->data_size);
163
164 /*
165 * If we have got to the end, erase the entire mrc-cache area and start
166 * again at block 0.
167 */
168 if (!cache) {
169 debug("Erasing the MRC cache region of %x bytes at %x\n",
170 entry->length, entry->offset);
171
172 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
173 if (ret) {
174 debug("Failed to erase flash region\n");
175 return ret;
176 }
177 cache = (struct mrc_data_container *)base_addr;
178 }
179
180 /* Write the data out */
181 offset = (ulong)cache - base_addr + entry->offset;
182 debug("Write MRC cache update to flash at %lx\n", offset);
183 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
184 cur);
185 if (ret) {
186 debug("Failed to write to SPI flash\n");
187 return log_msg_ret("Cannot update mrccache", ret);
188 }
189
190 return 0;
191 }
192
mrccache_setup(struct mrc_output * mrc,void * data)193 static void mrccache_setup(struct mrc_output *mrc, void *data)
194 {
195 struct mrc_data_container *cache = data;
196 u16 checksum;
197
198 cache->signature = MRC_DATA_SIGNATURE;
199 cache->data_size = mrc->len;
200 checksum = compute_ip_checksum(mrc->buf, cache->data_size);
201 log_debug("Saving %d bytes for MRC output data, checksum %04x\n",
202 cache->data_size, checksum);
203 cache->checksum = checksum;
204 cache->reserved = 0;
205 memcpy(cache->data, mrc->buf, cache->data_size);
206
207 mrc->cache = cache;
208 }
209
mrccache_reserve(void)210 int mrccache_reserve(void)
211 {
212 int i;
213
214 for (i = 0; i < MRC_TYPE_COUNT; i++) {
215 struct mrc_output *mrc = &gd->arch.mrc[i];
216
217 if (!mrc->len)
218 continue;
219
220 /* adjust stack pointer to store pure cache data plus header */
221 gd->start_addr_sp -= (mrc->len + MRC_DATA_HEADER_SIZE);
222 mrccache_setup(mrc, (void *)gd->start_addr_sp);
223
224 gd->start_addr_sp &= ~0xf;
225 }
226
227 return 0;
228 }
229
mrccache_get_region(enum mrc_type_t type,struct udevice ** devp,struct mrc_region * entry)230 int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
231 struct mrc_region *entry)
232 {
233 struct udevice *dev;
234 ofnode mrc_node;
235 ulong map_base;
236 uint map_size;
237 uint offset;
238 ofnode node;
239 u32 reg[2];
240 int ret;
241
242 /*
243 * Find the flash chip within the SPI controller node. Avoid probing
244 * the device here since it may put it into a strange state where the
245 * memory map cannot be read.
246 */
247 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
248 if (ret || !dev) {
249 /*
250 * Fall back to searching the device tree since driver model
251 * may not be ready yet (e.g. with FSPv1)
252 */
253 node = ofnode_by_compatible(ofnode_null(), "jedec,spi-nor");
254 if (!ofnode_valid(node))
255 return log_msg_ret("Cannot find SPI flash\n", -ENOENT);
256 ret = -ENODEV;
257 } else {
258 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
259 if (!ret)
260 entry->base = map_base;
261 node = dev_ofnode(dev);
262 }
263
264 /*
265 * At this point we have entry->base if ret == 0. If not, then we have
266 * the node and can look for memory-map
267 */
268 if (ret) {
269 ret = ofnode_read_u32_array(node, "memory-map", reg, 2);
270 if (ret)
271 return log_msg_ret("Cannot find memory map\n", ret);
272 entry->base = reg[0];
273 }
274
275 /* Find the place where we put the MRC cache */
276 mrc_node = ofnode_find_subnode(node, type == MRC_TYPE_NORMAL ?
277 "rw-mrc-cache" : "rw-var-mrc-cache");
278 if (!ofnode_valid(mrc_node))
279 return log_msg_ret("Cannot find node", -EPERM);
280
281 ret = ofnode_read_u32_array(mrc_node, "reg", reg, 2);
282 if (ret)
283 return log_msg_ret("Cannot find address", ret);
284 entry->offset = reg[0];
285 entry->length = reg[1];
286
287 if (devp)
288 *devp = dev;
289 debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n",
290 type, dev ? dev->name : ofnode_get_name(node), entry->offset,
291 entry->length, entry->base);
292
293 return 0;
294 }
295
mrccache_save_type(enum mrc_type_t type)296 static int mrccache_save_type(enum mrc_type_t type)
297 {
298 struct mrc_data_container *cache;
299 struct mrc_output *mrc;
300 struct mrc_region entry;
301 struct udevice *sf;
302 int ret;
303
304 mrc = &gd->arch.mrc[type];
305 if (!mrc->len)
306 return 0;
307 log_debug("Saving %x bytes of MRC output data type %d to SPI flash\n",
308 mrc->len, type);
309 ret = mrccache_get_region(type, &sf, &entry);
310 if (ret)
311 return log_msg_ret("Cannot get region", ret);
312 ret = device_probe(sf);
313 if (ret)
314 return log_msg_ret("Cannot probe device", ret);
315 cache = mrc->cache;
316
317 ret = mrccache_update(sf, &entry, cache);
318 if (!ret)
319 debug("Saved MRC data with checksum %04x\n", cache->checksum);
320 else if (ret == -EEXIST)
321 debug("MRC data is the same as last time, skipping save\n");
322
323 return 0;
324 }
325
mrccache_save(void)326 int mrccache_save(void)
327 {
328 int i;
329
330 for (i = 0; i < MRC_TYPE_COUNT; i++) {
331 int ret;
332
333 ret = mrccache_save_type(i);
334 if (ret)
335 return ret;
336 }
337
338 return 0;
339 }
340
mrccache_spl_save(void)341 int mrccache_spl_save(void)
342 {
343 int i;
344
345 for (i = 0; i < MRC_TYPE_COUNT; i++) {
346 struct mrc_output *mrc = &gd->arch.mrc[i];
347 void *data;
348 int size;
349
350 size = mrc->len + MRC_DATA_HEADER_SIZE;
351 data = malloc(size);
352 if (!data)
353 return log_msg_ret("Allocate MRC cache block", -ENOMEM);
354 mrccache_setup(mrc, data);
355 }
356
357 return mrccache_save();
358 }
359