1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015 Google, Inc
4 */
5
6 #include <dm.h>
7 #include <log.h>
8 #include <mapmem.h>
9 #include <regmap.h>
10 #include <syscon.h>
11 #include <rand.h>
12 #include <time.h>
13 #include <asm/test.h>
14 #include <dm/test.h>
15 #include <dm/devres.h>
16 #include <linux/err.h>
17 #include <test/test.h>
18 #include <test/ut.h>
19
20 /* Base test of register maps */
dm_test_regmap_base(struct unit_test_state * uts)21 static int dm_test_regmap_base(struct unit_test_state *uts)
22 {
23 struct udevice *dev;
24 struct regmap *map;
25 ofnode node;
26 int i;
27
28 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
29 map = syscon_get_regmap(dev);
30 ut_assertok_ptr(map);
31 ut_asserteq(1, map->range_count);
32 ut_asserteq(0x10, map->ranges[0].start);
33 ut_asserteq(16, map->ranges[0].size);
34 ut_asserteq(0x10, map_to_sysmem(regmap_get_range(map, 0)));
35
36 ut_assertok(uclass_get_device(UCLASS_SYSCON, 1, &dev));
37 map = syscon_get_regmap(dev);
38 ut_assertok_ptr(map);
39 ut_asserteq(4, map->range_count);
40 ut_asserteq(0x20, map->ranges[0].start);
41 for (i = 0; i < 4; i++) {
42 const unsigned long addr = 0x20 + 8 * i;
43
44 ut_asserteq(addr, map->ranges[i].start);
45 ut_asserteq(5 + i, map->ranges[i].size);
46 ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
47 }
48
49 /* Check that we can't pretend a different device is a syscon */
50 ut_assertok(uclass_get_device(UCLASS_I2C, 0, &dev));
51 map = syscon_get_regmap(dev);
52 ut_asserteq_ptr(ERR_PTR(-ENOEXEC), map);
53
54 /* A different device can be a syscon by using Linux-compat API */
55 node = ofnode_path("/syscon@2");
56 ut_assert(ofnode_valid(node));
57
58 map = syscon_node_to_regmap(node);
59 ut_assertok_ptr(map);
60 ut_asserteq(4, map->range_count);
61 ut_asserteq(0x40, map->ranges[0].start);
62 for (i = 0; i < 4; i++) {
63 const unsigned long addr = 0x40 + 8 * i;
64
65 ut_asserteq(addr, map->ranges[i].start);
66 ut_asserteq(5 + i, map->ranges[i].size);
67 ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
68 }
69
70 return 0;
71 }
72 DM_TEST(dm_test_regmap_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
73
74 /* Test we can access a regmap through syscon */
dm_test_regmap_syscon(struct unit_test_state * uts)75 static int dm_test_regmap_syscon(struct unit_test_state *uts)
76 {
77 struct regmap *map;
78
79 map = syscon_get_regmap_by_driver_data(SYSCON0);
80 ut_assertok_ptr(map);
81 ut_asserteq(1, map->range_count);
82
83 map = syscon_get_regmap_by_driver_data(SYSCON1);
84 ut_assertok_ptr(map);
85 ut_asserteq(4, map->range_count);
86
87 map = syscon_get_regmap_by_driver_data(SYSCON_COUNT);
88 ut_asserteq_ptr(ERR_PTR(-ENODEV), map);
89
90 ut_asserteq(0x10, map_to_sysmem(syscon_get_first_range(SYSCON0)));
91 ut_asserteq(0x20, map_to_sysmem(syscon_get_first_range(SYSCON1)));
92 ut_asserteq_ptr(ERR_PTR(-ENODEV),
93 syscon_get_first_range(SYSCON_COUNT));
94
95 return 0;
96 }
97 DM_TEST(dm_test_regmap_syscon, UTF_SCAN_PDATA | UTF_SCAN_FDT);
98
99 /* Read/Write/Modify test */
dm_test_regmap_rw(struct unit_test_state * uts)100 static int dm_test_regmap_rw(struct unit_test_state *uts)
101 {
102 struct udevice *dev;
103 struct regmap *map;
104 uint reg;
105
106 sandbox_set_enable_memio(true);
107 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
108 map = syscon_get_regmap(dev);
109 ut_assertok_ptr(map);
110
111 ut_assertok(regmap_write(map, 0, 0xcacafafa));
112 ut_assertok(regmap_write(map, 5, 0x55aa2211));
113
114 ut_assertok(regmap_read(map, 0, ®));
115 ut_asserteq(0xcacafafa, reg);
116 ut_assertok(regmap_read(map, 5, ®));
117 ut_asserteq(0x55aa2211, reg);
118
119 ut_assertok(regmap_read(map, 0, ®));
120 ut_asserteq(0xcacafafa, reg);
121 ut_assertok(regmap_update_bits(map, 0, 0xff00ff00, 0x55aa2211));
122 ut_assertok(regmap_read(map, 0, ®));
123 ut_asserteq(0x55ca22fa, reg);
124 ut_assertok(regmap_update_bits(map, 5, 0x00ff00ff, 0xcacafada));
125 ut_assertok(regmap_read(map, 5, ®));
126 ut_asserteq(0x55ca22da, reg);
127
128 return 0;
129 }
130 DM_TEST(dm_test_regmap_rw, UTF_SCAN_PDATA | UTF_SCAN_FDT);
131
132 /* Get/Set test */
dm_test_regmap_getset(struct unit_test_state * uts)133 static int dm_test_regmap_getset(struct unit_test_state *uts)
134 {
135 struct udevice *dev;
136 struct regmap *map;
137 uint reg;
138 struct layout {
139 u32 val0;
140 u32 val1;
141 u32 val2;
142 u32 val3;
143 };
144
145 sandbox_set_enable_memio(true);
146 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
147 map = syscon_get_regmap(dev);
148 ut_assertok_ptr(map);
149
150 regmap_set(map, struct layout, val0, 0xcacafafa);
151 regmap_set(map, struct layout, val3, 0x55aa2211);
152
153 ut_assertok(regmap_get(map, struct layout, val0, ®));
154 ut_asserteq(0xcacafafa, reg);
155 ut_assertok(regmap_get(map, struct layout, val3, ®));
156 ut_asserteq(0x55aa2211, reg);
157
158 return 0;
159 }
160 DM_TEST(dm_test_regmap_getset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
161
162 /* Read polling test */
dm_test_regmap_poll(struct unit_test_state * uts)163 static int dm_test_regmap_poll(struct unit_test_state *uts)
164 {
165 struct udevice *dev;
166 struct regmap *map;
167 uint reg;
168 unsigned long start;
169
170 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
171 map = syscon_get_regmap(dev);
172 ut_assertok_ptr(map);
173
174 start = get_timer(0);
175
176 ut_assertok(regmap_write(map, 0, 0x0));
177 ut_asserteq(-ETIMEDOUT,
178 regmap_read_poll_timeout_test(map, 0, reg,
179 (reg == 0xcacafafa),
180 1, 5 * CONFIG_SYS_HZ,
181 5 * CONFIG_SYS_HZ));
182
183 ut_assert(get_timer(start) > (5 * CONFIG_SYS_HZ));
184
185 return 0;
186 }
187 DM_TEST(dm_test_regmap_poll, UTF_SCAN_PDATA | UTF_SCAN_FDT);
188
189 struct regmaptest_priv {
190 struct regmap *cfg_regmap; /* For testing regmap_config options. */
191 struct regmap *fld_regmap; /* For testing regmap fields. */
192 struct regmap_field **fields;
193 };
194
195 static const struct reg_field field_cfgs[] = {
196 {
197 .reg = 0,
198 .lsb = 0,
199 .msb = 6,
200 },
201 {
202 .reg = 2,
203 .lsb = 4,
204 .msb = 12,
205 },
206 {
207 .reg = 2,
208 .lsb = 12,
209 .msb = 15,
210 }
211 };
212
213 #define REGMAP_TEST_BUF_START 0
214 #define REGMAP_TEST_BUF_SZ 5
215
remaptest_probe(struct udevice * dev)216 static int remaptest_probe(struct udevice *dev)
217 {
218 struct regmaptest_priv *priv = dev_get_priv(dev);
219 struct regmap *regmap;
220 struct regmap_field *field;
221 struct regmap_config cfg;
222 int i;
223 static const int n = ARRAY_SIZE(field_cfgs);
224
225 /*
226 * To exercise all the regmap config options, create a regmap that
227 * points to a custom memory area instead of the one defined in device
228 * tree. Use 2-byte elements. To allow directly indexing into the
229 * elements, use an offset shift of 1. So, accessing offset 1 gets the
230 * element at index 1 at memory location 2.
231 *
232 * REGMAP_TEST_BUF_SZ is the number of elements, so we need to multiply
233 * it by 2 because r_size expects number of bytes.
234 */
235 cfg.reg_offset_shift = 1;
236 cfg.r_start = REGMAP_TEST_BUF_START;
237 cfg.r_size = REGMAP_TEST_BUF_SZ * 2;
238 cfg.width = REGMAP_SIZE_16;
239
240 regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
241 if (IS_ERR(regmap))
242 return PTR_ERR(regmap);
243 priv->cfg_regmap = regmap;
244
245 memset(&cfg, 0, sizeof(struct regmap_config));
246 cfg.width = REGMAP_SIZE_16;
247
248 regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
249 if (IS_ERR(regmap))
250 return PTR_ERR(regmap);
251 priv->fld_regmap = regmap;
252
253 priv->fields = devm_kzalloc(dev, sizeof(struct regmap_field *) * n,
254 GFP_KERNEL);
255 if (!priv->fields)
256 return -ENOMEM;
257
258 for (i = 0 ; i < n; i++) {
259 field = devm_regmap_field_alloc(dev, priv->fld_regmap,
260 field_cfgs[i]);
261 if (IS_ERR(field))
262 return PTR_ERR(field);
263 priv->fields[i] = field;
264 }
265
266 return 0;
267 }
268
269 static const struct udevice_id regmaptest_ids[] = {
270 { .compatible = "sandbox,regmap_test" },
271 { }
272 };
273
274 U_BOOT_DRIVER(regmap_test) = {
275 .name = "regmaptest_drv",
276 .of_match = regmaptest_ids,
277 .id = UCLASS_NOP,
278 .probe = remaptest_probe,
279 .priv_auto = sizeof(struct regmaptest_priv),
280 };
281
dm_test_devm_regmap(struct unit_test_state * uts)282 static int dm_test_devm_regmap(struct unit_test_state *uts)
283 {
284 int i = 0;
285 uint val;
286 u16 pattern[REGMAP_TEST_BUF_SZ];
287 u16 *buffer;
288 struct udevice *dev;
289 struct regmaptest_priv *priv;
290
291 sandbox_set_enable_memio(true);
292
293 /*
294 * Map the memory area the regmap should point to so we can make sure
295 * the writes actually go to that location.
296 */
297 buffer = map_physmem(REGMAP_TEST_BUF_START,
298 REGMAP_TEST_BUF_SZ * 2, MAP_NOCACHE);
299
300 ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
301 &dev));
302 priv = dev_get_priv(dev);
303
304 for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
305 pattern[i] = i * 0x87654321;
306 ut_assertok(regmap_write(priv->cfg_regmap, i, pattern[i]));
307 }
308 for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
309 ut_assertok(regmap_read(priv->cfg_regmap, i, &val));
310 ut_asserteq(val, buffer[i]);
311 ut_asserteq(val, pattern[i]);
312 }
313
314 ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
315 val));
316 ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
317 &val));
318 ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, -1, val));
319 ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, -1, &val));
320
321 return 0;
322 }
323 DM_TEST(dm_test_devm_regmap, UTF_SCAN_PDATA | UTF_SCAN_FDT);
324
test_one_field(struct unit_test_state * uts,struct regmap * regmap,struct regmap_field * field,struct reg_field field_cfg)325 static int test_one_field(struct unit_test_state *uts,
326 struct regmap *regmap,
327 struct regmap_field *field,
328 struct reg_field field_cfg)
329 {
330 int j;
331 unsigned int val;
332 int mask = (1 << (field_cfg.msb - field_cfg.lsb + 1)) - 1;
333 int shift = field_cfg.lsb;
334
335 ut_assertok(regmap_write(regmap, field_cfg.reg, 0));
336 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
337 ut_asserteq(0, val);
338
339 for (j = 0; j <= mask; j++) {
340 ut_assertok(regmap_field_write(field, j));
341 ut_assertok(regmap_field_read(field, &val));
342 ut_asserteq(j, val);
343 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
344 ut_asserteq(j << shift, val);
345 }
346
347 ut_assertok(regmap_field_write(field, mask + 1));
348 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
349 ut_asserteq(0, val);
350
351 ut_assertok(regmap_field_write(field, 0xFFFF));
352 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
353 ut_asserteq(mask << shift, val);
354
355 ut_assertok(regmap_write(regmap, field_cfg.reg, 0xFFFF));
356 ut_assertok(regmap_field_write(field, 0));
357 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
358 ut_asserteq(0xFFFF & ~(mask << shift), val);
359 return 0;
360 }
361
dm_test_devm_regmap_field(struct unit_test_state * uts)362 static int dm_test_devm_regmap_field(struct unit_test_state *uts)
363 {
364 int i, rc;
365 struct udevice *dev;
366 struct regmaptest_priv *priv;
367
368 ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
369 &dev));
370 priv = dev_get_priv(dev);
371
372 sandbox_set_enable_memio(true);
373 for (i = 0 ; i < ARRAY_SIZE(field_cfgs); i++) {
374 rc = test_one_field(uts, priv->fld_regmap, priv->fields[i],
375 field_cfgs[i]);
376 if (rc)
377 break;
378 }
379
380 return 0;
381 }
382 DM_TEST(dm_test_devm_regmap_field, UTF_SCAN_PDATA | UTF_SCAN_FDT);
383