1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Copyright 2015-2017 Google, Inc
4 */
5
6 #ifndef __LINUX_USB_PD_H
7 #define __LINUX_USB_PD_H
8
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11
12 enum typec_port_type {
13 TYPEC_PORT_SRC,
14 TYPEC_PORT_SNK,
15 TYPEC_PORT_DRP,
16 };
17
18 enum typec_data_role {
19 TYPEC_DEVICE,
20 TYPEC_HOST,
21 };
22
23 enum typec_role {
24 TYPEC_SINK,
25 TYPEC_SOURCE,
26 };
27
28 /* USB PD Messages */
29 enum pd_ctrl_msg_type {
30 /* 0 Reserved */
31 PD_CTRL_GOOD_CRC = 1,
32 PD_CTRL_GOTO_MIN = 2,
33 PD_CTRL_ACCEPT = 3,
34 PD_CTRL_REJECT = 4,
35 PD_CTRL_PING = 5,
36 PD_CTRL_PS_RDY = 6,
37 PD_CTRL_GET_SOURCE_CAP = 7,
38 PD_CTRL_GET_SINK_CAP = 8,
39 PD_CTRL_DR_SWAP = 9,
40 PD_CTRL_PR_SWAP = 10,
41 PD_CTRL_VCONN_SWAP = 11,
42 PD_CTRL_WAIT = 12,
43 PD_CTRL_SOFT_RESET = 13,
44 /* 14-15 Reserved */
45 PD_CTRL_NOT_SUPP = 16,
46 PD_CTRL_GET_SOURCE_CAP_EXT = 17,
47 PD_CTRL_GET_STATUS = 18,
48 PD_CTRL_FR_SWAP = 19,
49 PD_CTRL_GET_PPS_STATUS = 20,
50 PD_CTRL_GET_COUNTRY_CODES = 21,
51 /* 22-31 Reserved */
52 };
53
54 enum pd_data_msg_type {
55 /* 0 Reserved */
56 PD_DATA_SOURCE_CAP = 1,
57 PD_DATA_REQUEST = 2,
58 PD_DATA_BIST = 3,
59 PD_DATA_SINK_CAP = 4,
60 PD_DATA_BATT_STATUS = 5,
61 PD_DATA_ALERT = 6,
62 PD_DATA_GET_COUNTRY_INFO = 7,
63 PD_DATA_ENTER_USB = 8,
64 /* 9-14 Reserved */
65 PD_DATA_VENDOR_DEF = 15,
66 /* 16-31 Reserved */
67 };
68
69 enum pd_ext_msg_type {
70 /* 0 Reserved */
71 PD_EXT_SOURCE_CAP_EXT = 1,
72 PD_EXT_STATUS = 2,
73 PD_EXT_GET_BATT_CAP = 3,
74 PD_EXT_GET_BATT_STATUS = 4,
75 PD_EXT_BATT_CAP = 5,
76 PD_EXT_GET_MANUFACTURER_INFO = 6,
77 PD_EXT_MANUFACTURER_INFO = 7,
78 PD_EXT_SECURITY_REQUEST = 8,
79 PD_EXT_SECURITY_RESPONSE = 9,
80 PD_EXT_FW_UPDATE_REQUEST = 10,
81 PD_EXT_FW_UPDATE_RESPONSE = 11,
82 PD_EXT_PPS_STATUS = 12,
83 PD_EXT_COUNTRY_INFO = 13,
84 PD_EXT_COUNTRY_CODES = 14,
85 /* 15-31 Reserved */
86 };
87
88 #define PD_REV10 0x0
89 #define PD_REV20 0x1
90 #define PD_REV30 0x2
91 #define PD_MAX_REV PD_REV30
92
93 #define PD_HEADER_EXT_HDR BIT(15)
94 #define PD_HEADER_CNT_SHIFT 12
95 #define PD_HEADER_CNT_MASK 0x7
96 #define PD_HEADER_ID_SHIFT 9
97 #define PD_HEADER_ID_MASK 0x7
98 #define PD_HEADER_PWR_ROLE BIT(8)
99 #define PD_HEADER_REV_SHIFT 6
100 #define PD_HEADER_REV_MASK 0x3
101 #define PD_HEADER_DATA_ROLE BIT(5)
102 #define PD_HEADER_TYPE_SHIFT 0
103 #define PD_HEADER_TYPE_MASK 0x1f
104
105 #define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \
106 ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \
107 ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \
108 ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \
109 ((rev) << PD_HEADER_REV_SHIFT) | \
110 (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \
111 (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \
112 ((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
113
114 #define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
115 cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
116
pd_header_cnt(u16 header)117 static inline unsigned int pd_header_cnt(u16 header)
118 {
119 return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
120 }
121
pd_header_cnt_le(__le16 header)122 static inline unsigned int pd_header_cnt_le(__le16 header)
123 {
124 return pd_header_cnt(le16_to_cpu(header));
125 }
126
pd_header_type(u16 header)127 static inline unsigned int pd_header_type(u16 header)
128 {
129 return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
130 }
131
pd_header_type_le(__le16 header)132 static inline unsigned int pd_header_type_le(__le16 header)
133 {
134 return pd_header_type(le16_to_cpu(header));
135 }
136
pd_header_msgid(u16 header)137 static inline unsigned int pd_header_msgid(u16 header)
138 {
139 return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
140 }
141
pd_header_msgid_le(__le16 header)142 static inline unsigned int pd_header_msgid_le(__le16 header)
143 {
144 return pd_header_msgid(le16_to_cpu(header));
145 }
146
pd_header_rev(u16 header)147 static inline unsigned int pd_header_rev(u16 header)
148 {
149 return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
150 }
151
pd_header_rev_le(__le16 header)152 static inline unsigned int pd_header_rev_le(__le16 header)
153 {
154 return pd_header_rev(le16_to_cpu(header));
155 }
156
157 #define PD_EXT_HDR_CHUNKED BIT(15)
158 #define PD_EXT_HDR_CHUNK_NUM_SHIFT 11
159 #define PD_EXT_HDR_CHUNK_NUM_MASK 0xf
160 #define PD_EXT_HDR_REQ_CHUNK BIT(10)
161 #define PD_EXT_HDR_DATA_SIZE_SHIFT 0
162 #define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff
163
164 #define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \
165 ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \
166 ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \
167 (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \
168 ((chunked) ? PD_EXT_HDR_CHUNKED : 0))
169
170 #define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
171 cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
172
pd_ext_header_chunk_num(u16 ext_header)173 static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
174 {
175 return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
176 PD_EXT_HDR_CHUNK_NUM_MASK;
177 }
178
pd_ext_header_data_size(u16 ext_header)179 static inline unsigned int pd_ext_header_data_size(u16 ext_header)
180 {
181 return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
182 PD_EXT_HDR_DATA_SIZE_MASK;
183 }
184
pd_ext_header_data_size_le(__le16 ext_header)185 static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
186 {
187 return pd_ext_header_data_size(le16_to_cpu(ext_header));
188 }
189
190 #define PD_MAX_PAYLOAD 7
191 #define PD_EXT_MAX_CHUNK_DATA 26
192
193 /*
194 * struct pd_chunked_ext_message_data - PD chunked extended message data as
195 * seen on wire
196 * @header: PD extended message header
197 * @data: PD extended message data
198 */
199 struct pd_chunked_ext_message_data {
200 __le16 header;
201 u8 data[PD_EXT_MAX_CHUNK_DATA];
202 } __packed;
203
204 /*
205 * struct pd_message - PD message as seen on wire
206 * @header: PD message header
207 * @payload: PD message payload
208 * @ext_msg: PD message chunked extended message data
209 */
210 struct pd_message {
211 __le16 header;
212 union {
213 __le32 payload[PD_MAX_PAYLOAD];
214 struct pd_chunked_ext_message_data ext_msg;
215 };
216 } __packed;
217
218 /* PDO: Power Data Object */
219 #define PDO_MAX_OBJECTS 7
220
221 enum pd_pdo_type {
222 PDO_TYPE_FIXED = 0,
223 PDO_TYPE_BATT = 1,
224 PDO_TYPE_VAR = 2,
225 PDO_TYPE_APDO = 3,
226 };
227
228 #define PDO_TYPE_SHIFT 30
229 #define PDO_TYPE_MASK 0x3
230
231 #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
232
233 #define PDO_VOLT_MASK 0x3ff
234 #define PDO_CURR_MASK 0x3ff
235 #define PDO_PWR_MASK 0x3ff
236
237 #define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */
238 #define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */
239 #define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */
240 #define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */
241 #define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */
242 #define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */
243 #define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */
244 #define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */
245 #define PDO_FIXED_FRS_CURR_SHIFT 23
246 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
247 #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
248
249 #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
250 #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
251
252 #define PDO_FIXED(mv, ma, flags) \
253 (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
254 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
255
256 #define VSAFE5V 5000 /* mv units */
257
258 #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
259 #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
260 #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
261
262 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
263 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
264 #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
265
266 #define PDO_BATT(min_mv, max_mv, max_mw) \
267 (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
268 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
269
270 #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
271 #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
272 #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
273
274 #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
275 #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
276 #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
277
278 #define PDO_VAR(min_mv, max_mv, max_ma) \
279 (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
280 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
281
282 enum pd_apdo_type {
283 APDO_TYPE_PPS = 0,
284 };
285
286 #define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
287 #define PDO_APDO_TYPE_MASK 0x3
288
289 #define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
290
291 #define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */
292 #define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */
293 #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
294
295 #define PDO_PPS_APDO_VOLT_MASK 0xff
296 #define PDO_PPS_APDO_CURR_MASK 0x7f
297
298 #define PDO_PPS_APDO_MIN_VOLT(mv) \
299 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
300 #define PDO_PPS_APDO_MAX_VOLT(mv) \
301 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
302 #define PDO_PPS_APDO_MAX_CURR(ma) \
303 ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
304
305 #define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
306 (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
307 PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
308 PDO_PPS_APDO_MAX_CURR(max_ma))
309
pdo_type(u32 pdo)310 static inline enum pd_pdo_type pdo_type(u32 pdo)
311 {
312 return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
313 }
314
pdo_fixed_voltage(u32 pdo)315 static inline unsigned int pdo_fixed_voltage(u32 pdo)
316 {
317 return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
318 }
319
pdo_min_voltage(u32 pdo)320 static inline unsigned int pdo_min_voltage(u32 pdo)
321 {
322 return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
323 }
324
pdo_max_voltage(u32 pdo)325 static inline unsigned int pdo_max_voltage(u32 pdo)
326 {
327 return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
328 }
329
pdo_max_current(u32 pdo)330 static inline unsigned int pdo_max_current(u32 pdo)
331 {
332 return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
333 }
334
pdo_max_power(u32 pdo)335 static inline unsigned int pdo_max_power(u32 pdo)
336 {
337 return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
338 }
339
pdo_apdo_type(u32 pdo)340 static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
341 {
342 return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
343 }
344
pdo_pps_apdo_min_voltage(u32 pdo)345 static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
346 {
347 return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
348 PDO_PPS_APDO_VOLT_MASK) * 100;
349 }
350
pdo_pps_apdo_max_voltage(u32 pdo)351 static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
352 {
353 return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
354 PDO_PPS_APDO_VOLT_MASK) * 100;
355 }
356
pdo_pps_apdo_max_current(u32 pdo)357 static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
358 {
359 return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
360 PDO_PPS_APDO_CURR_MASK) * 50;
361 }
362
363 /* RDO: Request Data Object */
364 #define RDO_OBJ_POS_SHIFT 28
365 #define RDO_OBJ_POS_MASK 0x7
366 #define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */
367 #define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */
368 #define RDO_USB_COMM BIT(25) /* USB communications capable */
369 #define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */
370
371 #define RDO_PWR_MASK 0x3ff
372 #define RDO_CURR_MASK 0x3ff
373
374 #define RDO_FIXED_OP_CURR_SHIFT 10
375 #define RDO_FIXED_MAX_CURR_SHIFT 0
376
377 #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
378
379 #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
380 #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
381
382 #define RDO_FIXED(idx, op_ma, max_ma, flags) \
383 (RDO_OBJ(idx) | (flags) | \
384 PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
385
386 #define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */
387 #define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
388
389 #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
390 #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
391
392 #define RDO_BATT(idx, op_mw, max_mw, flags) \
393 (RDO_OBJ(idx) | (flags) | \
394 RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
395
396 #define RDO_PROG_VOLT_MASK 0x7ff
397 #define RDO_PROG_CURR_MASK 0x7f
398
399 #define RDO_PROG_VOLT_SHIFT 9
400 #define RDO_PROG_CURR_SHIFT 0
401
402 #define RDO_PROG_VOLT_MV_STEP 20
403 #define RDO_PROG_CURR_MA_STEP 50
404
405 #define PDO_PROG_OUT_VOLT(mv) \
406 ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
407 #define PDO_PROG_OP_CURR(ma) \
408 ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
409
410 #define RDO_PROG(idx, out_mv, op_ma, flags) \
411 (RDO_OBJ(idx) | (flags) | \
412 PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
413
rdo_index(u32 rdo)414 static inline unsigned int rdo_index(u32 rdo)
415 {
416 return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
417 }
418
rdo_op_current(u32 rdo)419 static inline unsigned int rdo_op_current(u32 rdo)
420 {
421 return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
422 }
423
rdo_max_current(u32 rdo)424 static inline unsigned int rdo_max_current(u32 rdo)
425 {
426 return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
427 RDO_CURR_MASK) * 10;
428 }
429
rdo_op_power(u32 rdo)430 static inline unsigned int rdo_op_power(u32 rdo)
431 {
432 return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
433 }
434
rdo_max_power(u32 rdo)435 static inline unsigned int rdo_max_power(u32 rdo)
436 {
437 return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
438 }
439
440 /* Enter_USB Data Object */
441 #define EUDO_USB_MODE_MASK GENMASK(30, 28)
442 #define EUDO_USB_MODE_SHIFT 28
443 #define EUDO_USB_MODE_USB2 0
444 #define EUDO_USB_MODE_USB3 1
445 #define EUDO_USB_MODE_USB4 2
446 #define EUDO_USB4_DRD BIT(26)
447 #define EUDO_USB3_DRD BIT(25)
448 #define EUDO_CABLE_SPEED_MASK GENMASK(23, 21)
449 #define EUDO_CABLE_SPEED_SHIFT 21
450 #define EUDO_CABLE_SPEED_USB2 0
451 #define EUDO_CABLE_SPEED_USB3_GEN1 1
452 #define EUDO_CABLE_SPEED_USB4_GEN2 2
453 #define EUDO_CABLE_SPEED_USB4_GEN3 3
454 #define EUDO_CABLE_TYPE_MASK GENMASK(20, 19)
455 #define EUDO_CABLE_TYPE_SHIFT 19
456 #define EUDO_CABLE_TYPE_PASSIVE 0
457 #define EUDO_CABLE_TYPE_RE_TIMER 1
458 #define EUDO_CABLE_TYPE_RE_DRIVER 2
459 #define EUDO_CABLE_TYPE_OPTICAL 3
460 #define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17)
461 #define EUDO_CABLE_CURRENT_SHIFT 17
462 #define EUDO_CABLE_CURRENT_NOTSUPP 0
463 #define EUDO_CABLE_CURRENT_3A 2
464 #define EUDO_CABLE_CURRENT_5A 3
465 #define EUDO_PCIE_SUPPORT BIT(16)
466 #define EUDO_DP_SUPPORT BIT(15)
467 #define EUDO_TBT_SUPPORT BIT(14)
468 #define EUDO_HOST_PRESENT BIT(13)
469
470 /* USB PD timers and counters */
471 #define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */
472 #define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */
473 #define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */
474 #define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */
475 #define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */
476 #define PD_T_SOURCE_ACTIVITY 45
477 #define PD_T_SINK_ACTIVITY 135
478 #define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */
479 #define PD_T_PS_TRANSITION 500
480 #define PD_T_SRC_TRANSITION 35
481 #define PD_T_DRP_SNK 40
482 #define PD_T_DRP_SRC 30
483 #define PD_T_PS_SOURCE_OFF 920
484 #define PD_T_PS_SOURCE_ON 480
485 #define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */
486 #define PD_T_PS_HARD_RESET 30
487 #define PD_T_SRC_RECOVER 760
488 #define PD_T_SRC_RECOVER_MAX 1000
489 #define PD_T_SRC_TURN_ON 275
490 #define PD_T_SAFE_0V 650
491 #define PD_T_VCONN_SOURCE_ON 100
492 #define PD_T_SINK_REQUEST 100 /* 100 ms minimum */
493 #define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */
494 #define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */
495 #define PD_T_NEWSRC 250 /* Maximum of 275ms */
496 #define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */
497 #define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */
498 #define PD_T_SINK_TX 16 /* 16 - 20 ms */
499 #define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */
500
501 #define PD_T_DRP_TRY 100 /* 75 - 150 ms */
502 #define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */
503
504 #define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */
505 #define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */
506 #define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */
507
508 #define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
509 #define PD_N_HARD_RESET_COUNT 1
510
511 #define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */
512
513 /* Time to wait for TCPC to complete transmit */
514 #define PD_T_TCPC_TX_TIMEOUT 100 /* in ms */
515
516 #endif /* __LINUX_USB_PD_H */
517