1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
5 *
6 * Copyright (C) 2008 for Samsung Electronics
7 *
8 * BSP Support for Samsung's UDC driver
9 * available at:
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 *
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
14 *
15 * Ported to u-boot:
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
18 */
19 #undef DEBUG
20 #include <clk.h>
21 #include <dm.h>
22 #include <generic-phy.h>
23 #include <log.h>
24 #include <malloc.h>
25 #include <reset.h>
26 #include <dm/device_compat.h>
27 #include <dm/devres.h>
28 #include <linux/bug.h>
29 #include <linux/delay.h>
30 #include <linux/printk.h>
31
32 #include <linux/bitfield.h>
33 #include <linux/errno.h>
34 #include <linux/list.h>
35
36 #include <linux/usb/ch9.h>
37 #include <linux/usb/otg.h>
38 #include <linux/usb/gadget.h>
39
40 #include <phys2bus.h>
41 #include <asm/byteorder.h>
42 #include <asm/unaligned.h>
43 #include <asm/io.h>
44
45 #include <asm/mach-types.h>
46
47 #include <power/regulator.h>
48
49 #include "../common/dwc2_core.h"
50 #include "dwc2_udc_otg_regs.h"
51 #include "dwc2_udc_otg_priv.h"
52
53 /***********************************************************/
54
55 #define OTG_DMA_MODE 1
56
57 #define DEBUG_SETUP 0
58 #define DEBUG_EP0 0
59 #define DEBUG_ISR 0
60 #define DEBUG_OUT_EP 0
61 #define DEBUG_IN_EP 0
62
63 #include <usb/dwc2_udc.h>
64
65 #define EP0_CON 0
66 #define EP_MASK 0xF
67
68 static char *state_names[] = {
69 "WAIT_FOR_SETUP",
70 "DATA_STATE_XMIT",
71 "DATA_STATE_NEED_ZLP",
72 "WAIT_FOR_OUT_STATUS",
73 "DATA_STATE_RECV",
74 "WAIT_FOR_COMPLETE",
75 "WAIT_FOR_OUT_COMPLETE",
76 "WAIT_FOR_IN_COMPLETE",
77 "WAIT_FOR_NULL_COMPLETE",
78 };
79
80 #define DRIVER_VERSION "15 March 2009"
81
82 struct dwc2_udc *the_controller;
83
84 static const char driver_name[] = "dwc2-udc";
85 static const char ep0name[] = "ep0-control";
86
87 /* Max packet size*/
88 static unsigned int ep0_fifo_size = 64;
89 static unsigned int ep_fifo_size = 512;
90 static unsigned int ep_fifo_size2 = 1024;
91 static int reset_available = 1;
92
93 static struct usb_ctrlrequest *usb_ctrl;
94 static dma_addr_t usb_ctrl_dma_addr;
95
96 /*
97 Local declarations.
98 */
99 static int dwc2_ep_enable(struct usb_ep *ep,
100 const struct usb_endpoint_descriptor *);
101 static int dwc2_ep_disable(struct usb_ep *ep);
102 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
103 gfp_t gfp_flags);
104 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
105
106 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
107 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
108 static int dwc2_fifo_status(struct usb_ep *ep);
109 static void dwc2_fifo_flush(struct usb_ep *ep);
110 static void dwc2_ep0_read(struct dwc2_udc *dev);
111 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
112 static void dwc2_handle_ep0(struct dwc2_udc *dev);
113 static int dwc2_ep0_write(struct dwc2_udc *dev);
114 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
115 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
116 static void stop_activity(struct dwc2_udc *dev,
117 struct usb_gadget_driver *driver);
118 static int udc_enable(struct dwc2_udc *dev);
119 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
120 static void reconfig_usbd(struct dwc2_udc *dev);
121 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
122 static void nuke(struct dwc2_ep *ep, int status);
123 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
124 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
125
set_udc_gadget_private_data(void * p)126 void set_udc_gadget_private_data(void *p)
127 {
128 debug_cond(DEBUG_SETUP != 0,
129 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
130 the_controller, p);
131 the_controller->gadget.dev.device_data = p;
132 }
133
get_udc_gadget_private_data(struct usb_gadget * gadget)134 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
135 {
136 return gadget->dev.device_data;
137 }
138
139 static struct usb_ep_ops dwc2_ep_ops = {
140 .enable = dwc2_ep_enable,
141 .disable = dwc2_ep_disable,
142
143 .alloc_request = dwc2_alloc_request,
144 .free_request = dwc2_free_request,
145
146 .queue = dwc2_queue,
147 .dequeue = dwc2_dequeue,
148
149 .set_halt = dwc2_udc_set_halt,
150 .fifo_status = dwc2_fifo_status,
151 .fifo_flush = dwc2_fifo_flush,
152 };
153
154 #define create_proc_files() do {} while (0)
155 #define remove_proc_files() do {} while (0)
156
157 /***********************************************************/
158
159 struct dwc2_core_regs *reg;
160
dfu_usb_get_reset(void)161 bool dfu_usb_get_reset(void)
162 {
163 return !!(readl(®->global_regs.gintsts) & GINTSTS_USBRST);
164 }
165
otg_phy_init(struct dwc2_udc * dev)166 __weak void otg_phy_init(struct dwc2_udc *dev) {}
otg_phy_off(struct dwc2_udc * dev)167 __weak void otg_phy_off(struct dwc2_udc *dev) {}
168
169 /***********************************************************/
170
171 #include "dwc2_udc_otg_xfer_dma.c"
172
173 /*
174 * udc_disable - disable USB device controller
175 */
udc_disable(struct dwc2_udc * dev)176 static void udc_disable(struct dwc2_udc *dev)
177 {
178 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
179
180 udc_set_address(dev, 0);
181
182 dev->ep0state = WAIT_FOR_SETUP;
183 dev->gadget.speed = USB_SPEED_UNKNOWN;
184 dev->usb_address = 0;
185
186 otg_phy_off(dev);
187 }
188
189 /*
190 * udc_reinit - initialize software state
191 */
udc_reinit(struct dwc2_udc * dev)192 static void udc_reinit(struct dwc2_udc *dev)
193 {
194 unsigned int i;
195
196 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
197
198 /* device/ep0 records init */
199 INIT_LIST_HEAD(&dev->gadget.ep_list);
200 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
201 dev->ep0state = WAIT_FOR_SETUP;
202
203 /* basic endpoint records init */
204 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
205 struct dwc2_ep *ep = &dev->ep[i];
206
207 if (i != 0)
208 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
209
210 ep->desc = 0;
211 ep->stopped = 0;
212 INIT_LIST_HEAD(&ep->queue);
213 ep->pio_irqs = 0;
214 }
215
216 /* the rest was statically initialized, and is read-only */
217 }
218
219 #define BYTES2MAXP(x) (x / 8)
220 #define MAXP2BYTES(x) (x * 8)
221
222 /* until it's enabled, this UDC should be completely invisible
223 * to any USB host.
224 */
udc_enable(struct dwc2_udc * dev)225 static int udc_enable(struct dwc2_udc *dev)
226 {
227 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
228
229 otg_phy_init(dev);
230 reconfig_usbd(dev);
231
232 debug_cond(DEBUG_SETUP != 0,
233 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
234 readl(®->global_regs.gintmsk));
235
236 dev->gadget.speed = USB_SPEED_UNKNOWN;
237
238 return 0;
239 }
240
dwc2_gadget_pullup(struct usb_gadget * g,int is_on)241 static int dwc2_gadget_pullup(struct usb_gadget *g, int is_on)
242 {
243 clrsetbits_le32(®->device_regs.dctl, DCTL_SFTDISCON,
244 is_on ? 0 : DCTL_SFTDISCON);
245
246 return 0;
247 }
248
249 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
250 /*
251 Register entry point for the peripheral controller driver.
252 */
usb_gadget_register_driver(struct usb_gadget_driver * driver)253 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
254 {
255 struct dwc2_udc *dev = the_controller;
256 int retval = 0;
257 unsigned long flags = 0;
258
259 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
260
261 if (!driver || driver->speed < USB_SPEED_FULL
262 || !driver->bind || !driver->disconnect || !driver->setup)
263 return -EINVAL;
264 if (!dev)
265 return -ENODEV;
266 if (dev->driver)
267 return -EBUSY;
268
269 spin_lock_irqsave(&dev->lock, flags);
270 /* first hook up the driver ... */
271 dev->driver = driver;
272 spin_unlock_irqrestore(&dev->lock, flags);
273
274 if (retval) { /* TODO */
275 printf("target device_add failed, error %d\n", retval);
276 return retval;
277 }
278
279 retval = driver->bind(&dev->gadget);
280 if (retval) {
281 debug_cond(DEBUG_SETUP != 0,
282 "%s: bind to driver --> error %d\n",
283 dev->gadget.name, retval);
284 dev->driver = 0;
285 return retval;
286 }
287
288 enable_irq(IRQ_OTG);
289
290 debug_cond(DEBUG_SETUP != 0,
291 "Registered gadget driver %s\n", dev->gadget.name);
292 udc_enable(dev);
293
294 return 0;
295 }
296
297 /*
298 * Unregister entry point for the peripheral controller driver.
299 */
usb_gadget_unregister_driver(struct usb_gadget_driver * driver)300 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
301 {
302 struct dwc2_udc *dev = the_controller;
303 unsigned long flags = 0;
304
305 if (!dev)
306 return -ENODEV;
307 if (!driver || driver != dev->driver)
308 return -EINVAL;
309
310 spin_lock_irqsave(&dev->lock, flags);
311 dev->driver = 0;
312 stop_activity(dev, driver);
313 spin_unlock_irqrestore(&dev->lock, flags);
314
315 driver->unbind(&dev->gadget);
316
317 disable_irq(IRQ_OTG);
318
319 udc_disable(dev);
320 return 0;
321 }
322 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
323
dwc2_gadget_start(struct usb_gadget * g,struct usb_gadget_driver * driver)324 static int dwc2_gadget_start(struct usb_gadget *g,
325 struct usb_gadget_driver *driver)
326 {
327 struct dwc2_udc *dev = the_controller;
328
329 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
330
331 if (!driver || driver->speed < USB_SPEED_FULL ||
332 !driver->bind || !driver->disconnect || !driver->setup)
333 return -EINVAL;
334
335 if (!dev)
336 return -ENODEV;
337
338 if (dev->driver)
339 return -EBUSY;
340
341 /* first hook up the driver ... */
342 dev->driver = driver;
343
344 debug_cond(DEBUG_SETUP != 0,
345 "Registered gadget driver %s\n", dev->gadget.name);
346 return udc_enable(dev);
347 }
348
dwc2_gadget_stop(struct usb_gadget * g)349 static int dwc2_gadget_stop(struct usb_gadget *g)
350 {
351 struct dwc2_udc *dev = the_controller;
352
353 if (!dev)
354 return -ENODEV;
355
356 if (!dev->driver)
357 return -EINVAL;
358
359 dev->driver = 0;
360 stop_activity(dev, dev->driver);
361
362 udc_disable(dev);
363
364 return 0;
365 }
366
367 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
368
369 /*
370 * done - retire a request; caller blocked irqs
371 */
done(struct dwc2_ep * ep,struct dwc2_request * req,int status)372 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
373 {
374 unsigned int stopped = ep->stopped;
375
376 debug("%s: %s %p, req = %p, stopped = %d\n",
377 __func__, ep->ep.name, ep, &req->req, stopped);
378
379 list_del_init(&req->queue);
380
381 if (likely(req->req.status == -EINPROGRESS))
382 req->req.status = status;
383 else
384 status = req->req.status;
385
386 if (status && status != -ESHUTDOWN) {
387 debug("complete %s req %p stat %d len %u/%u\n",
388 ep->ep.name, &req->req, status,
389 req->req.actual, req->req.length);
390 }
391
392 /* don't modify queue heads during completion callback */
393 ep->stopped = 1;
394
395 #ifdef DEBUG
396 printf("calling complete callback\n");
397 {
398 int i, len = req->req.length;
399
400 printf("pkt[%d] = ", req->req.length);
401 if (len > 64)
402 len = 64;
403 for (i = 0; i < len; i++) {
404 printf("%02x", ((u8 *)req->req.buf)[i]);
405 if ((i & 7) == 7)
406 printf(" ");
407 }
408 printf("\n");
409 }
410 #endif
411 spin_unlock(&ep->dev->lock);
412 req->req.complete(&ep->ep, &req->req);
413 spin_lock(&ep->dev->lock);
414
415 debug("callback completed\n");
416
417 ep->stopped = stopped;
418 }
419
420 /*
421 * nuke - dequeue ALL requests
422 */
nuke(struct dwc2_ep * ep,int status)423 static void nuke(struct dwc2_ep *ep, int status)
424 {
425 struct dwc2_request *req;
426
427 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
428
429 /* called with irqs blocked */
430 while (!list_empty(&ep->queue)) {
431 req = list_entry(ep->queue.next, struct dwc2_request, queue);
432 done(ep, req, status);
433 }
434 }
435
stop_activity(struct dwc2_udc * dev,struct usb_gadget_driver * driver)436 static void stop_activity(struct dwc2_udc *dev,
437 struct usb_gadget_driver *driver)
438 {
439 int i;
440
441 /* don't disconnect drivers more than once */
442 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
443 driver = 0;
444 dev->gadget.speed = USB_SPEED_UNKNOWN;
445
446 /* prevent new request submissions, kill any outstanding requests */
447 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
448 struct dwc2_ep *ep = &dev->ep[i];
449 ep->stopped = 1;
450 nuke(ep, -ESHUTDOWN);
451 }
452
453 /* report disconnect; the driver is already quiesced */
454 if (driver) {
455 spin_unlock(&dev->lock);
456 driver->disconnect(&dev->gadget);
457 spin_lock(&dev->lock);
458 }
459
460 /* re-init driver-visible data structures */
461 udc_reinit(dev);
462 }
463
reconfig_usbd(struct dwc2_udc * dev)464 static void reconfig_usbd(struct dwc2_udc *dev)
465 {
466 /* 2. Soft-reset OTG Core and then unreset again. */
467 int i;
468 u32 dflt_gusbcfg;
469 u32 rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
470 u32 max_hw_ep;
471 int pdata_hw_ep;
472
473 dwc2_core_reset(reg);
474
475 debug("Resetting OTG controller\n");
476
477 dflt_gusbcfg =
478 0<<15 /* PHY Low Power Clock sel*/
479 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
480 |0x5<<10 /* Turnaround time*/
481 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
482 /* 1:SRP enable] H1= 1,1*/
483 |0<<7 /* Ulpi DDR sel*/
484 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
485 |0<<4 /* 0: utmi+, 1:ulpi*/
486 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
487 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
488 #else
489 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
490 #endif
491 |0x7<<0; /* HS/FS Timeout**/
492
493 if (dev->pdata->usb_gusbcfg)
494 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
495
496 writel(dflt_gusbcfg, ®->global_regs.gusbcfg);
497
498 /* 3. Put the OTG device core in the disconnected state.*/
499 setbits_le32(®->device_regs.dctl, DCTL_SFTDISCON);
500
501 udelay(20);
502
503 /* 4. Make the OTG device core exit from the disconnected state.*/
504 clrbits_le32(®->device_regs.dctl, DCTL_SFTDISCON);
505
506 /* 5. Configure OTG Core to initial settings of device mode.*/
507 /* [][1: full speed(30Mhz) 0:high speed]*/
508 writel(FIELD_PREP(DCFG_EPMISCNT_MASK, 1) |
509 FIELD_PREP(DCFG_DEVSPD_MASK, DCFG_DEVSPD_HS), ®->device_regs.dcfg);
510
511 mdelay(1);
512
513 /* 6. Unmask the core interrupts*/
514 writel(GINTMSK_INIT, ®->global_regs.gintmsk);
515
516 /* 7. Set NAK bit of EP0, EP1, EP2*/
517 writel(DXEPCTL_EPDIS | DXEPCTL_SNAK, ®->device_regs.out_endp[EP0_CON].doepctl);
518 writel(DXEPCTL_EPDIS | DXEPCTL_SNAK, ®->device_regs.in_endp[EP0_CON].diepctl);
519
520 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
521 writel(DXEPCTL_EPDIS | DXEPCTL_SNAK, ®->device_regs.out_endp[i].doepctl);
522 writel(DXEPCTL_EPDIS | DXEPCTL_SNAK, ®->device_regs.in_endp[i].diepctl);
523 }
524
525 /* 8. Unmask EPO interrupts*/
526 writel(FIELD_PREP(DAINT_OUTEP_MASK, BIT(EP0_CON)) |
527 FIELD_PREP(DAINT_INEP_MASK, BIT(EP0_CON)), ®->device_regs.daintmsk);
528
529 /* 9. Unmask device OUT EP common interrupts*/
530 writel(DOEPMSK_INIT, ®->device_regs.doepmsk);
531
532 /* 10. Unmask device IN EP common interrupts*/
533 writel(DIEPMSK_INIT, ®->device_regs.diepmsk);
534
535 rx_fifo_sz = RX_FIFO_SIZE;
536 np_tx_fifo_sz = NPTX_FIFO_SIZE;
537 tx_fifo_sz = PTX_FIFO_SIZE;
538
539 if (dev->pdata->rx_fifo_sz)
540 rx_fifo_sz = dev->pdata->rx_fifo_sz;
541 if (dev->pdata->np_tx_fifo_sz)
542 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
543 if (dev->pdata->tx_fifo_sz)
544 tx_fifo_sz = dev->pdata->tx_fifo_sz;
545
546 /* 11. Set Rx FIFO Size (in 32-bit words) */
547 writel(rx_fifo_sz, ®->global_regs.grxfsiz);
548
549 /* 12. Set Non Periodic Tx FIFO Size */
550 writel(FIELD_PREP(FIFOSIZE_DEPTH_MASK, np_tx_fifo_sz) |
551 FIELD_PREP(FIFOSIZE_STARTADDR_MASK, rx_fifo_sz),
552 ®->global_regs.gnptxfsiz);
553
554 /* retrieve the number of IN Endpoints (excluding ep0) */
555 max_hw_ep = FIELD_GET(GHWCFG4_NUM_IN_EPS_MASK, readl(®->global_regs.ghwcfg4));
556 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
557
558 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
559 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
560 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
561 max_hw_ep, pdata_hw_ep);
562
563 for (i = 0; i < max_hw_ep; i++) {
564 if (pdata_hw_ep)
565 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
566
567 writel(FIELD_PREP(FIFOSIZE_DEPTH_MASK, tx_fifo_sz) |
568 FIELD_PREP(FIFOSIZE_STARTADDR_MASK,
569 rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz * i),
570 ®->global_regs.dptxfsizn[i]);
571 }
572 /* Flush the RX FIFO */
573 dwc2_flush_rx_fifo(reg);
574
575 /* Flush all the Tx FIFO's */
576 dwc2_flush_tx_fifo(reg, GRSTCTL_TXFNUM_ALL);
577
578 /* 13. Clear NAK bit of EP0, EP1, EP2*/
579 /* For Slave mode*/
580 /* EP0: Control OUT */
581 writel(DXEPCTL_EPDIS | DXEPCTL_CNAK,
582 ®->device_regs.out_endp[EP0_CON].doepctl);
583
584 /* 14. Initialize OTG Link Core.*/
585 writel(GAHBCFG_INIT, ®->global_regs.gahbcfg);
586 }
587
set_max_pktsize(struct dwc2_udc * dev,enum usb_device_speed speed)588 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
589 {
590 int i;
591
592 if (speed == USB_SPEED_HIGH) {
593 ep0_fifo_size = 64;
594 ep_fifo_size = 512;
595 ep_fifo_size2 = 1024;
596 dev->gadget.speed = USB_SPEED_HIGH;
597 } else {
598 ep0_fifo_size = 64;
599 ep_fifo_size = 64;
600 ep_fifo_size2 = 64;
601 dev->gadget.speed = USB_SPEED_FULL;
602 }
603
604 dev->ep[0].ep.maxpacket = ep0_fifo_size;
605 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
606 dev->ep[i].ep.maxpacket = ep_fifo_size;
607
608 /* EP0 - Control IN (64 bytes)*/
609 setbits_le32(®->device_regs.in_endp[EP0_CON].diepctl, (0 << 0));
610
611 /* EP0 - Control OUT (64 bytes)*/
612 setbits_le32(®->device_regs.out_endp[EP0_CON].doepctl, (0 << 0));
613 }
614
dwc2_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)615 static int dwc2_ep_enable(struct usb_ep *_ep,
616 const struct usb_endpoint_descriptor *desc)
617 {
618 struct dwc2_ep *ep;
619 struct dwc2_udc *dev;
620 unsigned long flags = 0;
621
622 debug("%s: %p\n", __func__, _ep);
623
624 ep = container_of(_ep, struct dwc2_ep, ep);
625 if (!_ep || !desc || ep->desc || _ep->name == ep0name
626 || desc->bDescriptorType != USB_DT_ENDPOINT
627 || ep->bEndpointAddress != desc->bEndpointAddress
628 || ep_maxpacket(ep) <
629 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
630
631 debug("%s: bad ep or descriptor\n", __func__);
632 return -EINVAL;
633 }
634
635 /* xfer types must match, except that interrupt ~= bulk */
636 if (ep->bmAttributes != desc->bmAttributes
637 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
638 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
639
640 debug("%s: %s type mismatch\n", __func__, _ep->name);
641 return -EINVAL;
642 }
643
644 /* hardware _could_ do smaller, but driver doesn't */
645 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
646 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
647 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
648
649 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
650 return -ERANGE;
651 }
652
653 dev = ep->dev;
654 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
655
656 debug("%s: bogus device state\n", __func__);
657 return -ESHUTDOWN;
658 }
659
660 _ep->desc = desc;
661 ep->stopped = 0;
662 ep->desc = desc;
663 ep->pio_irqs = 0;
664 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
665
666 /* Reset halt state */
667 dwc2_udc_set_nak(ep);
668 dwc2_udc_set_halt(_ep, 0);
669
670 spin_lock_irqsave(&ep->dev->lock, flags);
671 dwc2_udc_ep_activate(ep);
672 spin_unlock_irqrestore(&ep->dev->lock, flags);
673
674 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
675 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
676 return 0;
677 }
678
679 /*
680 * Disable EP
681 */
dwc2_ep_disable(struct usb_ep * _ep)682 static int dwc2_ep_disable(struct usb_ep *_ep)
683 {
684 struct dwc2_ep *ep;
685 unsigned long flags = 0;
686
687 debug("%s: %p\n", __func__, _ep);
688
689 ep = container_of(_ep, struct dwc2_ep, ep);
690 if (!_ep || !ep->desc) {
691 debug("%s: %s not enabled\n", __func__,
692 _ep ? ep->ep.name : NULL);
693 return -EINVAL;
694 }
695
696 spin_lock_irqsave(&ep->dev->lock, flags);
697
698 /* Nuke all pending requests */
699 nuke(ep, -ESHUTDOWN);
700
701 _ep->desc = NULL;
702 ep->desc = 0;
703 ep->stopped = 1;
704
705 spin_unlock_irqrestore(&ep->dev->lock, flags);
706
707 debug("%s: disabled %s\n", __func__, _ep->name);
708 return 0;
709 }
710
dwc2_alloc_request(struct usb_ep * ep,gfp_t gfp_flags)711 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
712 gfp_t gfp_flags)
713 {
714 struct dwc2_request *req;
715
716 debug("%s: %s %p\n", __func__, ep->name, ep);
717
718 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
719 if (!req)
720 return 0;
721
722 memset(req, 0, sizeof *req);
723 INIT_LIST_HEAD(&req->queue);
724
725 return &req->req;
726 }
727
dwc2_free_request(struct usb_ep * ep,struct usb_request * _req)728 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
729 {
730 struct dwc2_request *req;
731
732 debug("%s: %p\n", __func__, ep);
733
734 req = container_of(_req, struct dwc2_request, req);
735 WARN_ON(!list_empty(&req->queue));
736 kfree(req);
737 }
738
739 /* dequeue JUST ONE request */
dwc2_dequeue(struct usb_ep * _ep,struct usb_request * _req)740 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
741 {
742 struct dwc2_ep *ep;
743 struct dwc2_request *req;
744 unsigned long flags = 0;
745
746 debug("%s: %p\n", __func__, _ep);
747
748 ep = container_of(_ep, struct dwc2_ep, ep);
749 if (!_ep || ep->ep.name == ep0name)
750 return -EINVAL;
751
752 spin_lock_irqsave(&ep->dev->lock, flags);
753
754 /* make sure it's actually queued on this endpoint */
755 list_for_each_entry(req, &ep->queue, queue) {
756 if (&req->req == _req)
757 break;
758 }
759 if (&req->req != _req) {
760 spin_unlock_irqrestore(&ep->dev->lock, flags);
761 return -EINVAL;
762 }
763
764 done(ep, req, -ECONNRESET);
765
766 spin_unlock_irqrestore(&ep->dev->lock, flags);
767 return 0;
768 }
769
770 /*
771 * Return bytes in EP FIFO
772 */
dwc2_fifo_status(struct usb_ep * _ep)773 static int dwc2_fifo_status(struct usb_ep *_ep)
774 {
775 int count = 0;
776 struct dwc2_ep *ep;
777
778 ep = container_of(_ep, struct dwc2_ep, ep);
779 if (!_ep) {
780 debug("%s: bad ep\n", __func__);
781 return -ENODEV;
782 }
783
784 debug("%s: %d\n", __func__, ep_index(ep));
785
786 /* LPD can't report unclaimed bytes from IN fifos */
787 if (ep_is_in(ep))
788 return -EOPNOTSUPP;
789
790 return count;
791 }
792
793 /*
794 * Flush EP FIFO
795 */
dwc2_fifo_flush(struct usb_ep * _ep)796 static void dwc2_fifo_flush(struct usb_ep *_ep)
797 {
798 struct dwc2_ep *ep;
799
800 ep = container_of(_ep, struct dwc2_ep, ep);
801 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
802 debug("%s: bad ep\n", __func__);
803 return;
804 }
805
806 debug("%s: %d\n", __func__, ep_index(ep));
807 }
808
809 static const struct usb_gadget_ops dwc2_udc_ops = {
810 .pullup = dwc2_gadget_pullup,
811 /* current versions must always be self-powered */
812 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
813 .udc_start = dwc2_gadget_start,
814 .udc_stop = dwc2_gadget_stop,
815 #endif
816 };
817
818 static struct dwc2_udc memory = {
819 .usb_address = 0,
820 .gadget = {
821 .ops = &dwc2_udc_ops,
822 .ep0 = &memory.ep[0].ep,
823 .name = driver_name,
824 },
825
826 /* control endpoint */
827 .ep[0] = {
828 .ep = {
829 .name = ep0name,
830 .ops = &dwc2_ep_ops,
831 .maxpacket = EP0_FIFO_SIZE,
832 },
833 .dev = &memory,
834
835 .bEndpointAddress = 0,
836 .bmAttributes = 0,
837
838 .ep_type = ep_control,
839 },
840
841 /* first group of endpoints */
842 .ep[1] = {
843 .ep = {
844 .name = "ep1in-bulk",
845 .ops = &dwc2_ep_ops,
846 .maxpacket = EP_FIFO_SIZE,
847 },
848 .dev = &memory,
849
850 .bEndpointAddress = USB_DIR_IN | 1,
851 .bmAttributes = USB_ENDPOINT_XFER_BULK,
852
853 .ep_type = ep_bulk_out,
854 .fifo_num = 1,
855 },
856
857 .ep[2] = {
858 .ep = {
859 .name = "ep2out-bulk",
860 .ops = &dwc2_ep_ops,
861 .maxpacket = EP_FIFO_SIZE,
862 },
863 .dev = &memory,
864
865 .bEndpointAddress = USB_DIR_OUT | 2,
866 .bmAttributes = USB_ENDPOINT_XFER_BULK,
867
868 .ep_type = ep_bulk_in,
869 .fifo_num = 2,
870 },
871
872 .ep[3] = {
873 .ep = {
874 .name = "ep3in-int",
875 .ops = &dwc2_ep_ops,
876 .maxpacket = EP_FIFO_SIZE,
877 },
878 .dev = &memory,
879
880 .bEndpointAddress = USB_DIR_IN | 3,
881 .bmAttributes = USB_ENDPOINT_XFER_INT,
882
883 .ep_type = ep_interrupt,
884 .fifo_num = 3,
885 },
886 };
887
888 /*
889 * probe - binds to the platform device
890 */
891
dwc2_udc_probe(struct dwc2_plat_otg_data * pdata)892 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
893 {
894 struct dwc2_udc *dev = &memory;
895 int retval = 0;
896
897 debug("%s: %p\n", __func__, pdata);
898
899 dev->pdata = pdata;
900
901 reg = (struct dwc2_core_regs *)pdata->regs_otg;
902
903 dev->gadget.is_dualspeed = 1; /* Hack only*/
904 dev->gadget.is_otg = 0;
905 dev->gadget.is_a_peripheral = 0;
906 dev->gadget.b_hnp_enable = 0;
907 dev->gadget.a_hnp_support = 0;
908 dev->gadget.a_alt_hnp_support = 0;
909
910 the_controller = dev;
911
912 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
913 ROUND(sizeof(struct usb_ctrlrequest),
914 CONFIG_SYS_CACHELINE_SIZE));
915 if (!usb_ctrl) {
916 pr_err("No memory available for UDC!\n");
917 return -ENOMEM;
918 }
919
920 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
921
922 udc_reinit(dev);
923
924 return retval;
925 }
926
dwc2_udc_handle_interrupt(void)927 int dwc2_udc_handle_interrupt(void)
928 {
929 u32 intr_status = readl(®->global_regs.gintsts);
930 u32 gintmsk = readl(®->global_regs.gintmsk);
931
932 if (intr_status & gintmsk)
933 return dwc2_udc_irq(1, (void *)the_controller);
934
935 return 0;
936 }
937
938 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
939 struct dwc2_priv_data {
940 struct clk_bulk clks;
941 struct reset_ctl_bulk resets;
942 struct phy_bulk phys;
943 struct udevice *usb33d_supply;
944 };
945
dwc2_phy_setup(struct udevice * dev,struct phy_bulk * phys)946 static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
947 {
948 int ret;
949
950 ret = generic_phy_get_bulk(dev, phys);
951 if (ret)
952 return ret;
953
954 ret = generic_phy_init_bulk(phys);
955 if (ret)
956 return ret;
957
958 ret = generic_phy_power_on_bulk(phys);
959 if (ret)
960 generic_phy_exit_bulk(phys);
961
962 return ret;
963 }
964
dwc2_phy_shutdown(struct udevice * dev,struct phy_bulk * phys)965 static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
966 {
967 generic_phy_power_off_bulk(phys);
968 generic_phy_exit_bulk(phys);
969 }
970
dwc2_udc_otg_of_to_plat(struct udevice * dev)971 static int dwc2_udc_otg_of_to_plat(struct udevice *dev)
972 {
973 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
974 ulong drvdata;
975 void (*set_params)(struct dwc2_plat_otg_data *data);
976 int ret;
977
978 if (usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_PERIPHERAL &&
979 usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_OTG) {
980 dev_dbg(dev, "Invalid mode\n");
981 return -ENODEV;
982 }
983
984 plat->regs_otg = dev_read_addr(dev);
985
986 plat->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
987 plat->np_tx_fifo_sz = dev_read_u32_default(dev, "g-np-tx-fifo-size", 0);
988
989 ret = dev_read_size(dev, "g-tx-fifo-size");
990 if (ret > 0)
991 plat->tx_fifo_sz_nb = ret / sizeof(u32);
992 if (plat->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
993 plat->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
994 if (plat->tx_fifo_sz_nb) {
995 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
996 plat->tx_fifo_sz_array,
997 plat->tx_fifo_sz_nb);
998 if (ret)
999 return ret;
1000 }
1001
1002 plat->force_b_session_valid =
1003 dev_read_bool(dev, "u-boot,force-b-session-valid");
1004
1005 plat->force_vbus_detection =
1006 dev_read_bool(dev, "u-boot,force-vbus-detection");
1007
1008 /* force plat according compatible */
1009 drvdata = dev_get_driver_data(dev);
1010 if (drvdata) {
1011 set_params = (void *)drvdata;
1012 set_params(plat);
1013 }
1014
1015 return 0;
1016 }
1017
dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data * p)1018 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1019 {
1020 p->activate_stm_id_vb_detection = true;
1021 p->usb_gusbcfg =
1022 0 << 15 /* PHY Low Power Clock sel*/
1023 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1024 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1025 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1026 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1027 | 0x7 << 0; /* FS timeout calibration**/
1028
1029 if (p->force_b_session_valid)
1030 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1031 }
1032
dwc2_udc_otg_reset_init(struct udevice * dev,struct reset_ctl_bulk * resets)1033 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1034 struct reset_ctl_bulk *resets)
1035 {
1036 int ret;
1037
1038 ret = reset_get_bulk(dev, resets);
1039 if (ret == -ENOTSUPP || ret == -ENOENT)
1040 return 0;
1041
1042 if (ret)
1043 return ret;
1044
1045 ret = reset_assert_bulk(resets);
1046
1047 if (!ret) {
1048 udelay(2);
1049 ret = reset_deassert_bulk(resets);
1050 }
1051 if (ret) {
1052 reset_release_bulk(resets);
1053 return ret;
1054 }
1055
1056 return 0;
1057 }
1058
dwc2_udc_otg_clk_init(struct udevice * dev,struct clk_bulk * clks)1059 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1060 struct clk_bulk *clks)
1061 {
1062 int ret;
1063
1064 ret = clk_get_bulk(dev, clks);
1065 if (ret == -ENOSYS)
1066 return 0;
1067
1068 if (ret)
1069 return ret;
1070
1071 ret = clk_enable_bulk(clks);
1072 if (ret) {
1073 clk_release_bulk(clks);
1074 return ret;
1075 }
1076
1077 return 0;
1078 }
1079
dwc2_udc_otg_probe(struct udevice * dev)1080 static int dwc2_udc_otg_probe(struct udevice *dev)
1081 {
1082 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1083 struct dwc2_priv_data *priv = dev_get_priv(dev);
1084 struct dwc2_core_regs *usbotg_reg =
1085 (struct dwc2_core_regs *)plat->regs_otg;
1086 int ret;
1087
1088 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1089 if (ret)
1090 return ret;
1091
1092 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1093 if (ret)
1094 return ret;
1095
1096 ret = dwc2_phy_setup(dev, &priv->phys);
1097 if (ret)
1098 return ret;
1099
1100 if (plat->activate_stm_id_vb_detection) {
1101 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1102 (!plat->force_b_session_valid ||
1103 plat->force_vbus_detection)) {
1104 ret = device_get_supply_regulator(dev, "usb33d-supply",
1105 &priv->usb33d_supply);
1106 if (ret) {
1107 dev_err(dev, "can't get voltage level detector supply\n");
1108 return ret;
1109 }
1110 ret = regulator_set_enable(priv->usb33d_supply, true);
1111 if (ret) {
1112 dev_err(dev, "can't enable voltage level detector supply\n");
1113 return ret;
1114 }
1115 }
1116
1117 if (plat->force_b_session_valid &&
1118 !plat->force_vbus_detection) {
1119 /* Override VBUS detection: enable then value*/
1120 setbits_le32(&usbotg_reg->global_regs.gotgctl, GOTGCTL_VBVALOEN);
1121 setbits_le32(&usbotg_reg->global_regs.gotgctl, GOTGCTL_VBVALOVAL);
1122 } else {
1123 /* Enable VBUS sensing */
1124 setbits_le32(&usbotg_reg->global_regs.ggpio,
1125 GGPIO_STM32_OTG_GCCFG_VBDEN);
1126 }
1127 if (plat->force_b_session_valid) {
1128 /* Override B session bits: enable then value */
1129 setbits_le32(&usbotg_reg->global_regs.gotgctl,
1130 GOTGCTL_AVALOEN | GOTGCTL_BVALOEN);
1131 setbits_le32(&usbotg_reg->global_regs.gotgctl,
1132 GOTGCTL_AVALOVAL | GOTGCTL_BVALOVAL);
1133 } else {
1134 /* Enable ID detection */
1135 setbits_le32(&usbotg_reg->global_regs.ggpio,
1136 GGPIO_STM32_OTG_GCCFG_IDEN);
1137 }
1138 }
1139
1140 ret = dwc2_udc_probe(plat);
1141 if (ret)
1142 return ret;
1143
1144 the_controller->driver = 0;
1145
1146 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1147
1148 return ret;
1149 }
1150
dwc2_udc_otg_remove(struct udevice * dev)1151 static int dwc2_udc_otg_remove(struct udevice *dev)
1152 {
1153 struct dwc2_priv_data *priv = dev_get_priv(dev);
1154
1155 usb_del_gadget_udc(&the_controller->gadget);
1156
1157 reset_release_bulk(&priv->resets);
1158
1159 clk_release_bulk(&priv->clks);
1160
1161 dwc2_phy_shutdown(dev, &priv->phys);
1162
1163 return dm_scan_fdt_dev(dev);
1164 }
1165
dwc2_gadget_handle_interrupts(struct udevice * dev)1166 static int dwc2_gadget_handle_interrupts(struct udevice *dev)
1167 {
1168 return dwc2_udc_handle_interrupt();
1169 }
1170
1171 static const struct usb_gadget_generic_ops dwc2_gadget_ops = {
1172 .handle_interrupts = dwc2_gadget_handle_interrupts,
1173 };
1174
1175 static const struct udevice_id dwc2_udc_otg_ids[] = {
1176 { .compatible = "snps,dwc2" },
1177 { .compatible = "brcm,bcm2835-usb" },
1178 { .compatible = "st,stm32mp15-hsotg",
1179 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1180 {},
1181 };
1182
1183 U_BOOT_DRIVER(dwc2_udc_otg) = {
1184 .name = "dwc2-udc-otg",
1185 .id = UCLASS_USB_GADGET_GENERIC,
1186 .of_match = dwc2_udc_otg_ids,
1187 .ops = &dwc2_gadget_ops,
1188 .of_to_plat = dwc2_udc_otg_of_to_plat,
1189 .probe = dwc2_udc_otg_probe,
1190 .remove = dwc2_udc_otg_remove,
1191 .plat_auto = sizeof(struct dwc2_plat_otg_data),
1192 .priv_auto = sizeof(struct dwc2_priv_data),
1193 };
1194
dwc2_udc_B_session_valid(struct udevice * dev)1195 int dwc2_udc_B_session_valid(struct udevice *dev)
1196 {
1197 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1198 struct dwc2_core_regs *usbotg_reg =
1199 (struct dwc2_core_regs *)plat->regs_otg;
1200
1201 return readl(&usbotg_reg->global_regs.gotgctl) & GOTGCTL_BSESVLD;
1202 }
1203 #else
dm_usb_gadget_handle_interrupts(struct udevice * dev)1204 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
1205 {
1206 return dwc2_udc_handle_interrupt();
1207 }
1208 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1209