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Searched defs:val (Results 1 – 25 of 274) sorted by relevance

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/arch/microblaze/include/asm/
A Dasm.h9 #define NGET(val, fslnum) \ argument
12 #define GET(val, fslnum) \ argument
15 #define NCGET(val, fslnum) \ argument
18 #define CGET(val, fslnum) \ argument
24 #define PUT(val, fslnum) \ argument
35 #define MFS(val, reg) \ argument
38 #define MTS(val, reg) \ argument
42 #define R14(val) \ argument
46 #define R17(val) \ argument
53 #define MSRSET(val) \ argument
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/arch/mips/include/asm/
A Dmipsregs.h1279 #define write_r10k_perf_cntr(counter,val) \ argument
1298 #define write_r10k_perf_cntl(counter,val) \ argument
1404 #define __write_ulong_c0_register(reg, sel, val) \ argument
1460 #define __write_64bit_c0_split(source, sel, val) \ argument
2016 #define __write_ulong_gc0_register(reg, sel, val) \ argument
2246 #define _write_32bit_cp1_register(dest, val, gas_hardfloat) \ argument
2260 #define write_32bit_cp1_register(dest, val) \ argument
2265 #define write_32bit_cp1_register(dest, val) \ argument
2285 #define wrdsp(val, mask) \ argument
2516 #define wrdsp(val, mask) \ argument
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/arch/x86/include/asm/
A Dcontrol_regs.h24 unsigned long val; in read_cr0() local
30 static inline void write_cr0(unsigned long val) in write_cr0()
37 unsigned long val; in read_cr2() local
45 unsigned long val; in read_cr3() local
53 unsigned long val; in read_cr4() local
61 unsigned long val = 0; /* Damn you, gcc! */ in get_debugreg() local
A Dmsr.h65 #define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32) argument
66 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) argument
68 #define DECLARE_ARGS(val, low, high) unsigned long long val argument
69 #define EAX_EDX_VAL(val, low, high) (val) argument
70 #define EAX_EDX_RET(val, low, high) "=A" (val) argument
123 #define rdmsrl(msr, val) \ argument
126 #define wrmsrl(msr, val) \ argument
131 u64 val; in msr_clrsetbits_64() local
141 u64 val; in msr_setbits_64() local
150 u64 val; in msr_clrbits_64() local
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/arch/arm/mach-imx/mx7ulp/
A Dpcc.c83 u32 reg, val; in pcc_clock_enable() local
113 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
162 u32 reg, val; in pcc_clock_div_config() local
198 u32 reg, val; in pcc_clock_is_enable() local
214 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
255 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
A Dscg.c56 u32 reg, val, rate; in scg_sircdiv_get_rate() local
94 u32 reg, val, rate; in scg_fircdiv_get_rate() local
132 u32 reg, val, rate; in scg_soscdiv_get_rate() local
170 u32 reg, val, rate; in scg_apll_pfd_get_rate() local
220 u32 reg, val, rate; in scg_spll_pfd_get_rate() local
270 u32 reg, val, rate; in scg_apll_get_rate() local
298 u32 reg, val, rate; in scg_spll_get_rate() local
333 u32 reg, val, rate, div; in scg_ddr_get_rate() local
437 u32 reg, val, rate; in scg_sys_get_rate() local
863 u32 val = 0; in scg_a7_spll_init() local
[all …]
/arch/arm/mach-imx/mx7/
A Dclock_slice.c435 u32 val; in clock_get_src() local
490 u32 val; in clock_get_prediv() local
549 u32 val; in clock_get_postdiv() local
574 u32 val; in clock_set_autopostdiv() local
612 u32 val; in clock_get_autopostdiv() local
649 int clock_get_target_val(enum clk_root_index clock_id, u32 *val) in clock_get_target_val()
659 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val()
673 u32 val; in clock_root_cfg() local
725 u32 val; in clock_root_enabled() local
A Dpsci-mx7.c156 u32 val; in imx_gpcv2_set_core_power() local
172 u32 mask, val; in imx_enable_cpu_ca7() local
252 u32 val; in psci_system_off() local
383 u32 val = readl(GPC_IPS_BASE_ADDR + GPC_LPCR_A7_AD); in imx_gpcv2_set_plat_power_gate_by_lpm() local
394 u32 val; in imx_gpcv2_set_cpu_power_gate_by_lpm() local
419 u32 val; in imx_gpcv2_set_slot_ack() local
442 u32 val; in imx_system_counter_resume() local
452 u32 val; in imx_system_counter_suspend() local
550 unsigned int i, val, imr[4], entry; in imx_system_resume() local
604 u32 i, val; in psci_system_suspend() local
/arch/mips/mach-ath79/ar933x/
A Dlowlevel_init.S14 #define SET_BIT(val, bit) ((val) | (1 << (bit))) argument
15 #define SET_PLL_PD(val) SET_BIT(val, 30) argument
16 #define AHB_DIV_TO_4(val) SET_BIT(SET_BIT(val, 15), 16) argument
17 #define PLL_BYPASS(val) SET_BIT(val, 2) argument
/arch/arm/mach-mvebu/
A Defuse.c107 struct efuse_val val; in do_prog_efuse() local
168 int mvebu_prog_ld_efuse(int ld1, u32 word, u32 val) in mvebu_prog_ld_efuse()
228 int mvebu_read_efuse(int nr, struct efuse_val *val) in mvebu_read_efuse()
265 int mvebu_write_efuse(int nr, struct efuse_val *val) in mvebu_write_efuse()
272 struct efuse_val val = { in mvebu_lock_efuse() local
292 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
322 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
328 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
367 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()
/arch/mips/mach-octeon/include/mach/
A Dcvmx-regs.h80 #define CVMX_MF_COP0(val, cop0) \ argument
82 #define CVMX_MT_COP0(val, cop0) \ argument
212 static inline void csr_wr(u64 addr, u64 val) in csr_wr()
217 static inline void csr_wr32(u64 addr, u32 val) in csr_wr32()
241 static inline void cvmx_write64_int64(u64 addr, s64 val) in cvmx_write64_int64()
261 static inline void cvmx_write64_int32(u64 addr, s32 val) in cvmx_write64_int32()
266 static inline void cvmx_write64_int16(u64 addr, s16 val) in cvmx_write64_int16()
281 static inline void cvmx_write64_uint8(u64 addr, u8 val) in cvmx_write64_uint8()
317 static inline void cvmx_write_io(u64 io_addr, u64 val) in cvmx_write_io()
469 static inline u32 cvmx_pop(u32 val) in cvmx_pop()
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/arch/arm/mach-imx/imx8m/
A Dclock_slice.c1663 int clock_get_target_val(enum clk_root_index clock_id, u32 *val) in clock_get_target_val()
1686 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val()
1713 u32 val; in clock_root_enabled() local
1765 u32 val; in clock_get_prediv() local
1803 u32 val, mask; in clock_get_postdiv() local
1845 u32 val; in clock_get_src() local
/arch/powerpc/include/asm/
A Dbyteorder.h10 unsigned val; in ld_le16() local
16 static __inline__ void st_le16(volatile unsigned short *addr, const unsigned val) in st_le16()
23 unsigned val; in ld_le32() local
29 static __inline__ void st_le32(volatile unsigned *addr, const unsigned val) in st_le32()
A Dio.h54 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
59 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) argument
62 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) argument
64 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) argument
68 #define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
70 #define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) argument
307 #define writeb_be(val, addr) \ argument
309 #define writew_be(val, addr) \ argument
311 #define writel_be(val, addr) \ argument
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A Dcache.h110 static inline void wr_ic_cst(uint val) in wr_ic_cst()
115 static inline void wr_ic_adr(uint val) in wr_ic_adr()
125 static inline void wr_dc_cst(uint val) in wr_dc_cst()
130 static inline void wr_dc_adr(uint val) in wr_dc_adr()
/arch/arm/mach-imx/imx8ulp/
A Dpcc.c285 u32 val; in pcc_clock_enable() local
318 u32 val, i, clksrc_type; in pcc_clock_sel() local
381 u32 val; in pcc_clock_div_config() local
423 u32 val; in pcc_clock_is_enable() local
443 u32 val, clksrc_type; in pcc_clock_get_clksrc() local
496 u32 val; in pcc_reset_peripheral() local
533 u32 val, rate, frac, div; in pcc_clock_get_rate() local
/arch/mips/mach-mtmips/
A Dddr_init.c33 static void dram_test_write(u32 addr, u32 val) in dram_test_write()
45 u32 val; in dram_test_read() local
56 u32 val; in dram_addr_test_bit() local
71 u32 val; in mc_ddr_init() local
/arch/arm/include/asm/
A Darmv7.h66 uint32_t val = 0; in read_l2ctlr() local
74 static inline void write_l2ctlr(uint32_t val) in write_l2ctlr()
91 uint32_t val; in v7_enable_l2_hazard_detect() local
107 uint32_t temp, val; in v7_enable_smp() local
/arch/arm/mach-socfpga/
A Dsecure_reg_helper.c38 int socfpga_secure_reg_read32(u32 id, u32 *val) in socfpga_secure_reg_read32()
59 int socfpga_secure_reg_write32(u32 id, u32 val) in socfpga_secure_reg_write32()
74 int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val) in socfpga_secure_reg_update32()
A Dfpga_manager.c26 unsigned long val; in is_fpgamgr_initdone_high() local
35 unsigned long val; in fpgamgr_get_mode() local
/arch/arm/mach-stm32mp/
A Dbsec.c185 u32 val; in bsec_power_safmem() local
211 u32 val; in bsec_shadow_register() local
254 static int bsec_read_shadow(struct udevice *dev, void __iomem *base, u32 *val, in bsec_read_shadow()
344 u32 val, addr; in bsec_permanent_lock_otp() local
406 static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) in stm32mp_bsec_read_otp()
439 static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) in stm32mp_bsec_read_shadow()
453 static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp) in stm32mp_bsec_read_lock()
468 static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) in stm32mp_bsec_write_otp()
483 static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) in stm32mp_bsec_write_shadow()
497 static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) in stm32mp_bsec_write_lock()
[all …]
/arch/arm/mach-lpc32xx/
A Dclk.c25 u32 val, m_div, n_div, p_div; in get_hclk_pll_rate() local
71 u32 val; in get_hclk_clk_div() local
85 u32 val; in get_periph_clk_div() local
/arch/mips/mach-mtmips/mt7620/
A Dsysc.c26 u32 val; in mt7620_sysc_read() local
44 u32 val; in mt7620_sysc_write() local
62 u32 val, shift; in mt7620_sysc_ioctl() local
/arch/arm/mach-sunxi/
A Ddram_sun50i_a133.c115 u32 val, temp1, temp2; in mctl_set_odtmap() local
418 u32 val; in mctl_drive_odt_config() local
467 u32 val, i; in mctl_phy_ca_bit_delay_compensation() local
525 u32 val, val2, i; in mctl_phy_init() local
800 u32 val, tmp; in mctl_phy_read_calibration() local
1032 u32 *ptr, val; in mctl_write_pattern() local
1047 u32 *ptr, val; in mctl_check_pattern() local
/arch/arm/mach-mvebu/armada3700/
A Defuse.c166 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
191 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
208 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
214 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()

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