1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2011 The Chromium OS Authors.
4  * (C) Copyright 2002-2006
5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6  *
7  * (C) Copyright 2002
8  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9  * Marius Groeger <mgroeger@sysgo.de>
10  */
11 
12 #include <config.h>
13 #include <bloblist.h>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
16 #include <console.h>
17 #include <cpu.h>
18 #include <cpu_func.h>
19 #include <cyclic.h>
20 #include <display_options.h>
21 #include <dm.h>
22 #include <env.h>
23 #include <env_internal.h>
24 #include <event.h>
25 #include <fdtdec.h>
26 #include <fs.h>
27 #include <hang.h>
28 #include <i2c.h>
29 #include <init.h>
30 #include <initcall.h>
31 #include <log.h>
32 #include <malloc.h>
33 #include <mapmem.h>
34 #include <os.h>
35 #include <post.h>
36 #include <relocate.h>
37 #include <serial.h>
38 #include <spl.h>
39 #include <status_led.h>
40 #include <sysreset.h>
41 #include <time.h>
42 #include <timer.h>
43 #include <trace.h>
44 #include <upl.h>
45 #include <video.h>
46 #include <watchdog.h>
47 #include <asm/cache.h>
48 #include <asm/global_data.h>
49 #include <asm/io.h>
50 #include <asm/sections.h>
51 #include <dm/root.h>
52 #include <linux/errno.h>
53 #include <linux/log2.h>
54 
55 DECLARE_GLOBAL_DATA_PTR;
56 
57 /*
58  * TODO(sjg@chromium.org): IMO this code should be
59  * refactored to a single function, something like:
60  *
61  * void led_set_state(enum led_colour_t colour, int on);
62  */
63 /************************************************************************
64  * Coloured LED functionality
65  ************************************************************************
66  * May be supplied by boards if desired
67  */
coloured_LED_init(void)68 __weak void coloured_LED_init(void) {}
red_led_on(void)69 __weak void red_led_on(void) {}
red_led_off(void)70 __weak void red_led_off(void) {}
green_led_on(void)71 __weak void green_led_on(void) {}
green_led_off(void)72 __weak void green_led_off(void) {}
yellow_led_on(void)73 __weak void yellow_led_on(void) {}
yellow_led_off(void)74 __weak void yellow_led_off(void) {}
blue_led_on(void)75 __weak void blue_led_on(void) {}
blue_led_off(void)76 __weak void blue_led_off(void) {}
77 
78 /*
79  * Why is gd allocated a register? Prior to reloc it might be better to
80  * just pass it around to each function in this file?
81  *
82  * After reloc one could argue that it is hardly used and doesn't need
83  * to be in a register. Or if it is it should perhaps hold pointers to all
84  * global data for all modules, so that post-reloc we can avoid the massive
85  * literal pool we get on ARM. Or perhaps just encourage each module to use
86  * a structure...
87  */
88 
89 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
init_func_watchdog_init(void)90 static int init_func_watchdog_init(void)
91 {
92 # if defined(CONFIG_HW_WATCHDOG) && \
93 	(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
94 	defined(CONFIG_SH) || \
95 	defined(CONFIG_DESIGNWARE_WATCHDOG) || \
96 	defined(CONFIG_IMX_WATCHDOG))
97 	hw_watchdog_init();
98 	puts("       Watchdog enabled\n");
99 # endif
100 	schedule();
101 
102 	return 0;
103 }
104 
init_func_watchdog_reset(void)105 int init_func_watchdog_reset(void)
106 {
107 	schedule();
108 
109 	return 0;
110 }
111 #endif /* CONFIG_WATCHDOG */
112 
board_add_ram_info(int use_default)113 __weak void board_add_ram_info(int use_default)
114 {
115 	/* please define platform specific board_add_ram_info() */
116 }
117 
init_baud_rate(void)118 static int init_baud_rate(void)
119 {
120 	gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
121 	return 0;
122 }
123 
display_text_info(void)124 static int display_text_info(void)
125 {
126 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
127 	ulong bss_start, bss_end, text_base;
128 
129 	bss_start = (ulong)__bss_start;
130 	bss_end = (ulong)__bss_end;
131 
132 #ifdef CONFIG_TEXT_BASE
133 	text_base = CONFIG_TEXT_BASE;
134 #else
135 	text_base = CONFIG_SYS_MONITOR_BASE;
136 #endif
137 
138 	debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
139 	      text_base, bss_start, bss_end);
140 #endif
141 
142 	return 0;
143 }
144 
145 #ifdef CONFIG_SYSRESET
print_resetinfo(void)146 static int print_resetinfo(void)
147 {
148 	struct udevice *dev;
149 	char status[256];
150 	bool status_printed = false;
151 	int ret;
152 
153 	/*
154 	 * Not all boards have sysreset drivers available during early
155 	 * boot, so don't fail if one can't be found.
156 	 */
157 	for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
158 	     ret = uclass_next_device_check(&dev)) {
159 		if (ret) {
160 			debug("%s: %s sysreset device (error: %d)\n",
161 			      __func__, dev->name, ret);
162 			continue;
163 		}
164 
165 		if (!sysreset_get_status(dev, status, sizeof(status))) {
166 			printf("%s%s", status_printed ? " " : "", status);
167 			status_printed = true;
168 		}
169 	}
170 	if (status_printed)
171 		printf("\n");
172 
173 	return 0;
174 }
175 #endif
176 
177 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
print_cpuinfo(void)178 static int print_cpuinfo(void)
179 {
180 	struct udevice *dev;
181 	char desc[512];
182 	int ret;
183 
184 	dev = cpu_get_current_dev();
185 	if (!dev) {
186 		debug("%s: Could not get CPU device\n",
187 		      __func__);
188 		return -ENODEV;
189 	}
190 
191 	ret = cpu_get_desc(dev, desc, sizeof(desc));
192 	if (ret) {
193 		debug("%s: Could not get CPU description (err = %d)\n",
194 		      dev->name, ret);
195 		return ret;
196 	}
197 
198 	printf("CPU:   %s\n", desc);
199 
200 	return 0;
201 }
202 #endif
203 
announce_dram_init(void)204 static int announce_dram_init(void)
205 {
206 	puts("DRAM:  ");
207 	return 0;
208 }
209 
210 /*
211  * From input size calculate its nearest rounded unit scale (multiply of 2^10)
212  * and value in calculated unit scale multiplied by 10 (as fractional fixed
213  * point number with one decimal digit), which is human natural format,
214  * same what uses print_size() function for displaying. Mathematically it is:
215  * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
216  *
217  * For example for size=87654321 we calculate scale=20 and val=836 which means
218  * that input has natural human format 83.6 M (mega = 2^20).
219  */
220 #define compute_size_scale_val(size, scale, val) do { \
221 	scale = ilog2(size) / 10 * 10; \
222 	val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
223 	if (val == 10240) { val = 10; scale += 10; } \
224 } while (0)
225 
226 /*
227  * Check if the sizes in their natural units written in decimal format with
228  * one fraction number are same.
229  */
sizes_near(unsigned long long size1,unsigned long long size2)230 static int sizes_near(unsigned long long size1, unsigned long long size2)
231 {
232 	unsigned int size1_scale, size1_val, size2_scale, size2_val;
233 
234 	compute_size_scale_val(size1, size1_scale, size1_val);
235 	compute_size_scale_val(size2, size2_scale, size2_val);
236 
237 	return size1_scale == size2_scale && size1_val == size2_val;
238 }
239 
show_dram_config(void)240 static int show_dram_config(void)
241 {
242 	unsigned long long size;
243 	int i;
244 
245 	debug("\nRAM Configuration:\n");
246 	for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
247 		size += gd->bd->bi_dram[i].size;
248 		debug("Bank #%d: %llx ", i,
249 		      (unsigned long long)(gd->bd->bi_dram[i].start));
250 #ifdef DEBUG
251 		print_size(gd->bd->bi_dram[i].size, "\n");
252 #endif
253 	}
254 	debug("\nDRAM:  ");
255 
256 	print_size(gd->ram_size, "");
257 	if (!sizes_near(gd->ram_size, size)) {
258 		printf(" (total ");
259 		print_size(size, ")");
260 	}
261 	board_add_ram_info(0);
262 	putc('\n');
263 
264 	return 0;
265 }
266 
dram_init_banksize(void)267 __weak int dram_init_banksize(void)
268 {
269 	gd->bd->bi_dram[0].start = gd->ram_base;
270 	gd->bd->bi_dram[0].size = get_effective_memsize();
271 
272 	return 0;
273 }
274 
275 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
init_func_i2c(void)276 static int init_func_i2c(void)
277 {
278 	puts("I2C:   ");
279 	i2c_init_all();
280 	puts("ready\n");
281 	return 0;
282 }
283 #endif
284 
setup_mon_len(void)285 static int setup_mon_len(void)
286 {
287 #if defined(CONFIG_ARCH_NEXELL)
288 	gd->mon_len = (ulong)__bss_end - (ulong)__image_copy_start;
289 #elif defined(__ARM__) || defined(__MICROBLAZE__)
290 	gd->mon_len = (ulong)__bss_end - (ulong)_start;
291 #elif defined(CONFIG_SANDBOX) && !defined(__riscv)
292 	gd->mon_len = (ulong)_end - (ulong)_init;
293 #elif defined(CONFIG_SANDBOX)
294 	/* gcc does not provide _init in crti.o on RISC-V */
295 	gd->mon_len = 0;
296 #elif defined(CONFIG_EFI_APP)
297 	gd->mon_len = (ulong)_end - (ulong)_init;
298 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
299 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
300 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
301 	gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
302 #elif defined(CONFIG_SYS_MONITOR_BASE)
303 	/* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
304 	gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
305 #endif
306 	return 0;
307 }
308 
setup_spl_handoff(void)309 static int setup_spl_handoff(void)
310 {
311 #if CONFIG_IS_ENABLED(HANDOFF)
312 	gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
313 					sizeof(struct spl_handoff));
314 	debug("Found SPL hand-off info %p\n", gd->spl_handoff);
315 #endif
316 
317 	return 0;
318 }
319 
arch_cpu_init(void)320 __weak int arch_cpu_init(void)
321 {
322 	return 0;
323 }
324 
mach_cpu_init(void)325 __weak int mach_cpu_init(void)
326 {
327 	return 0;
328 }
329 
330 /* Get the top of usable RAM */
board_get_usable_ram_top(phys_size_t total_size)331 __weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
332 {
333 #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
334 	/*
335 	 * Detect whether we have so much RAM that it goes past the end of our
336 	 * 32-bit address space. If so, clip the usable RAM so it doesn't.
337 	 */
338 	if (gd->ram_top < CFG_SYS_SDRAM_BASE)
339 		/*
340 		 * Will wrap back to top of 32-bit space when reservations
341 		 * are made.
342 		 */
343 		return 0;
344 #endif
345 	return gd->ram_top;
346 }
347 
arch_setup_dest_addr(void)348 __weak int arch_setup_dest_addr(void)
349 {
350 	return 0;
351 }
352 
setup_dest_addr(void)353 static int setup_dest_addr(void)
354 {
355 	debug("Monitor len: %08x\n", gd->mon_len);
356 	/*
357 	 * Ram is setup, size stored in gd !!
358 	 */
359 	debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
360 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
361 	/*
362 	 * Subtract specified amount of memory to hide so that it won't
363 	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
364 	 * the Linux kernel should now get passed the now "corrected"
365 	 * memory size and won't touch it either. This should work
366 	 * for arch/ppc and arch/powerpc. Only Linux board ports in
367 	 * arch/powerpc with bootwrapper support, that recalculate the
368 	 * memory size from the SDRAM controller setup will have to
369 	 * get fixed.
370 	 */
371 	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
372 #endif
373 #ifdef CFG_SYS_SDRAM_BASE
374 	gd->ram_base = CFG_SYS_SDRAM_BASE;
375 #endif
376 	gd->ram_top = gd->ram_base + get_effective_memsize();
377 	gd->ram_top = board_get_usable_ram_top(gd->mon_len);
378 	gd->relocaddr = gd->ram_top;
379 	debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
380 
381 	return arch_setup_dest_addr();
382 }
383 
384 #ifdef CFG_PRAM
385 /* reserve protected RAM */
reserve_pram(void)386 static int reserve_pram(void)
387 {
388 	ulong reg;
389 
390 	reg = env_get_ulong("pram", 10, CFG_PRAM);
391 	gd->relocaddr -= (reg << 10);		/* size is in kB */
392 	debug("Reserving %ldk for protected RAM at %08lx\n", reg,
393 	      gd->relocaddr);
394 	return 0;
395 }
396 #endif /* CFG_PRAM */
397 
398 /* Round memory pointer down to next 4 kB limit */
reserve_round_4k(void)399 static int reserve_round_4k(void)
400 {
401 	gd->relocaddr &= ~(4096 - 1);
402 	return 0;
403 }
404 
arch_reserve_mmu(void)405 __weak int arch_reserve_mmu(void)
406 {
407 	return 0;
408 }
409 
reserve_video_from_videoblob(void)410 static int reserve_video_from_videoblob(void)
411 {
412 	if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() > PHASE_SPL) {
413 		struct video_handoff *ho;
414 		int ret = 0;
415 
416 		ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
417 		if (!ho)
418 			return log_msg_ret("Missing video bloblist", -ENOENT);
419 
420 		ret = video_reserve_from_bloblist(ho);
421 		if (ret)
422 			return log_msg_ret("Invalid Video handoff info", ret);
423 
424 		/* Sanity check fb from blob is before current relocaddr */
425 		if (likely(gd->relocaddr > (unsigned long)ho->fb))
426 			gd->relocaddr = ho->fb;
427 	}
428 
429 	return 0;
430 }
431 
432 /*
433  * Check if any bloblist received specifying reserved areas from previous stage and adjust
434  * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
435  * from previous stage.
436  *
437  * NOTE:
438  * IT is recommended that all bloblists from previous stage are reserved from ram_top
439  * as next stage will simply start reserving further regions after them.
440  */
setup_relocaddr_from_bloblist(void)441 static int setup_relocaddr_from_bloblist(void)
442 {
443 	reserve_video_from_videoblob();
444 
445 	return 0;
446 }
447 
reserve_video(void)448 static int reserve_video(void)
449 {
450 	if (CONFIG_IS_ENABLED(VIDEO)) {
451 		ulong addr;
452 		int ret;
453 
454 		addr = gd->relocaddr;
455 		ret = video_reserve(&addr);
456 		if (ret)
457 			return ret;
458 		debug("Reserving %luk for video at: %08lx\n",
459 		      ((unsigned long)gd->relocaddr - addr) >> 10, addr);
460 		gd->relocaddr = addr;
461 	}
462 
463 	return 0;
464 }
465 
reserve_trace(void)466 static int reserve_trace(void)
467 {
468 #ifdef CONFIG_TRACE
469 	gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
470 	gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
471 	debug("Reserving %luk for trace data at: %08lx\n",
472 	      (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
473 #endif
474 
475 	return 0;
476 }
477 
reserve_uboot(void)478 static int reserve_uboot(void)
479 {
480 	/*
481 	 * This should be the first place GD_FLG_SKIP_RELOC is read from.
482 	 * Set GD_FLG_SKIP_RELOC flag if CONFIG_SKIP_RELOCATE is enabled.
483 	 */
484 	if (CONFIG_IS_ENABLED(SKIP_RELOCATE))
485 		gd->flags |= GD_FLG_SKIP_RELOC;
486 
487 	if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
488 		/*
489 		 * reserve memory for U-Boot code, data & bss
490 		 * round down to next 4 kB limit
491 		 */
492 		gd->relocaddr -= gd->mon_len;
493 		gd->relocaddr &= ~(4096 - 1);
494 	#if defined(CONFIG_E500) || defined(CONFIG_MIPS)
495 		/* round down to next 64 kB limit so that IVPR stays aligned */
496 		gd->relocaddr &= ~(65536 - 1);
497 	#endif
498 
499 		debug("Reserving %dk for U-Boot at: %08lx\n",
500 		      gd->mon_len >> 10, gd->relocaddr);
501 	}
502 
503 	gd->start_addr_sp = gd->relocaddr;
504 
505 	return 0;
506 }
507 
508 /*
509  * reserve after start_addr_sp the requested size and make the stack pointer
510  * 16-byte aligned, this alignment is needed for cast on the reserved memory
511  * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
512  *     = ARMv8 Instruction Set Overview: quad word, 16 bytes
513  */
reserve_stack_aligned(size_t size)514 static unsigned long reserve_stack_aligned(size_t size)
515 {
516 	return ALIGN_DOWN(gd->start_addr_sp - size, 16);
517 }
518 
519 #ifdef CONFIG_SYS_NONCACHED_MEMORY
reserve_noncached(void)520 static int reserve_noncached(void)
521 {
522 	/*
523 	 * The value of gd->start_addr_sp must match the value of
524 	 * mem_malloc_start calculated in board_r.c:initr_malloc(), which is
525 	 * passed to dlmalloc.c:mem_malloc_init() and then used by
526 	 * cache.c:noncached_init()
527 	 *
528 	 * These calculations must match the code in cache.c:noncached_init()
529 	 */
530 	gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
531 		MMU_SECTION_SIZE;
532 	gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
533 				   MMU_SECTION_SIZE);
534 	debug("Reserving %dM for noncached_alloc() at: %08lx\n",
535 	      CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
536 
537 	return 0;
538 }
539 #endif
540 
541 /* reserve memory for malloc() area */
reserve_malloc(void)542 static int reserve_malloc(void)
543 {
544 	gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
545 	debug("Reserving %dk for malloc() at: %08lx\n",
546 	      TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
547 #ifdef CONFIG_SYS_NONCACHED_MEMORY
548 	reserve_noncached();
549 #endif
550 
551 	return 0;
552 }
553 
554 /* (permanently) allocate a Board Info struct */
reserve_board(void)555 static int reserve_board(void)
556 {
557 	if (!gd->bd) {
558 		gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
559 		gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
560 						      sizeof(struct bd_info));
561 		memset(gd->bd, '\0', sizeof(struct bd_info));
562 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
563 		      sizeof(struct bd_info), gd->start_addr_sp);
564 	}
565 	return 0;
566 }
567 
reserve_global_data(void)568 static int reserve_global_data(void)
569 {
570 	gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
571 	gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
572 	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
573 	      sizeof(gd_t), gd->start_addr_sp);
574 	return 0;
575 }
576 
reserve_fdt(void)577 static int reserve_fdt(void)
578 {
579 	if (!IS_ENABLED(CONFIG_OF_EMBED)) {
580 		/*
581 		 * If the device tree is sitting immediately above our image
582 		 * then we must relocate it. If it is embedded in the data
583 		 * section, then it will be relocated with other data.
584 		 */
585 		if (gd->fdt_blob) {
586 			gd->boardf->fdt_size =
587 				ALIGN(fdt_totalsize(gd->fdt_blob), 32);
588 
589 			gd->start_addr_sp = reserve_stack_aligned(
590 				gd->boardf->fdt_size);
591 			gd->boardf->new_fdt = map_sysmem(gd->start_addr_sp,
592 							 gd->boardf->fdt_size);
593 			debug("Reserving %lu Bytes for FDT at: %08lx\n",
594 			      gd->boardf->fdt_size, gd->start_addr_sp);
595 		}
596 	}
597 
598 	return 0;
599 }
600 
reserve_bootstage(void)601 static int reserve_bootstage(void)
602 {
603 #ifdef CONFIG_BOOTSTAGE
604 	int size = bootstage_get_size(true);
605 
606 	gd->start_addr_sp = reserve_stack_aligned(size);
607 	gd->boardf->new_bootstage = map_sysmem(gd->start_addr_sp, size);
608 	debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
609 	      gd->start_addr_sp);
610 #endif
611 
612 	return 0;
613 }
614 
arch_reserve_stacks(void)615 __weak int arch_reserve_stacks(void)
616 {
617 	return 0;
618 }
619 
reserve_stacks(void)620 static int reserve_stacks(void)
621 {
622 	/* make stack pointer 16-byte aligned */
623 	gd->start_addr_sp = reserve_stack_aligned(16);
624 
625 	/*
626 	 * let the architecture-specific code tailor gd->start_addr_sp and
627 	 * gd->irq_sp
628 	 */
629 	return arch_reserve_stacks();
630 }
631 
reserve_bloblist(void)632 static int reserve_bloblist(void)
633 {
634 #ifdef CONFIG_BLOBLIST
635 	ulong size = bloblist_get_total_size();
636 
637 	if (size < CONFIG_BLOBLIST_SIZE_RELOC)
638 		size = CONFIG_BLOBLIST_SIZE_RELOC;
639 
640 	/* Align to a 4KB boundary for easier reading of addresses */
641 	gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - size, 0x1000);
642 	gd->boardf->new_bloblist = map_sysmem(gd->start_addr_sp, size);
643 #endif
644 
645 	return 0;
646 }
647 
display_new_sp(void)648 static int display_new_sp(void)
649 {
650 	debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
651 
652 	return 0;
653 }
654 
arch_setup_bdinfo(void)655 __weak int arch_setup_bdinfo(void)
656 {
657 	return 0;
658 }
659 
setup_bdinfo(void)660 int setup_bdinfo(void)
661 {
662 	return arch_setup_bdinfo();
663 }
664 
665 #ifdef CONFIG_POST
init_post(void)666 static int init_post(void)
667 {
668 	post_bootmode_init();
669 	post_run(NULL, POST_ROM | post_bootmode_get(0));
670 
671 	return 0;
672 }
673 #endif
674 
reloc_fdt(void)675 static int reloc_fdt(void)
676 {
677 	if (!IS_ENABLED(CONFIG_OF_EMBED)) {
678 		if (gd->boardf->new_fdt) {
679 			memcpy(gd->boardf->new_fdt, gd->fdt_blob,
680 			       fdt_totalsize(gd->fdt_blob));
681 			gd->fdt_blob = gd->boardf->new_fdt;
682 		}
683 	}
684 
685 	return 0;
686 }
687 
reloc_bootstage(void)688 static int reloc_bootstage(void)
689 {
690 #ifdef CONFIG_BOOTSTAGE
691 	if (gd->flags & GD_FLG_SKIP_RELOC)
692 		return 0;
693 	if (gd->boardf->new_bootstage)
694 		bootstage_relocate(gd->boardf->new_bootstage);
695 #endif
696 
697 	return 0;
698 }
699 
reloc_bloblist(void)700 static int reloc_bloblist(void)
701 {
702 #ifdef CONFIG_BLOBLIST
703 	/*
704 	 * Relocate only if we are supposed to send it
705 	 */
706 	if ((gd->flags & GD_FLG_SKIP_RELOC) &&
707 	    CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
708 		debug("Not relocating bloblist\n");
709 		return 0;
710 	}
711 	if (gd->boardf->new_bloblist) {
712 		ulong size = bloblist_get_total_size();
713 
714 		if (size < CONFIG_BLOBLIST_SIZE_RELOC)
715 			size = CONFIG_BLOBLIST_SIZE_RELOC;
716 
717 		debug("Copying bloblist from %p to %p, size %lx\n",
718 		      gd->bloblist, gd->boardf->new_bloblist, size);
719 		return bloblist_reloc(gd->boardf->new_bloblist, size);
720 	}
721 #endif
722 
723 	return 0;
724 }
725 
726 void mcheck_on_ramrelocation(size_t offset);
setup_reloc(void)727 static int setup_reloc(void)
728 {
729 	if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
730 #ifdef CONFIG_TEXT_BASE
731 #ifdef ARM
732 		gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
733 #elif defined(CONFIG_MICROBLAZE)
734 		gd->reloc_off = gd->relocaddr - (u32)_start;
735 #elif defined(CONFIG_M68K)
736 		/*
737 		 * On all ColdFire arch cpu, monitor code starts always
738 		 * just after the default vector table location, so at 0x400
739 		 */
740 		gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
741 #elif !defined(CONFIG_SANDBOX)
742 		gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
743 #endif
744 #endif
745 	}
746 
747 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
748 
749 	if (gd->flags & GD_FLG_SKIP_RELOC) {
750 		debug("Skipping relocation due to flag\n");
751 	} else {
752 #ifdef MCHECK_HEAP_PROTECTION
753 		mcheck_on_ramrelocation(gd->reloc_off);
754 #endif
755 		debug("Relocation Offset is: %08lx\n", gd->reloc_off);
756 		debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
757 		      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
758 		      gd->start_addr_sp);
759 	}
760 
761 	return 0;
762 }
763 
764 #if CONFIG_IS_ENABLED(OF_BOARD_FIXUP)
fix_fdt(void)765 static int fix_fdt(void)
766 {
767 	return board_fix_fdt((void *)gd->fdt_blob);
768 }
769 #endif
770 
771 /* ARM calls relocate_code from its crt0.S */
772 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
773 
jump_to_copy(void)774 static int jump_to_copy(void)
775 {
776 	if (gd->flags & GD_FLG_SKIP_RELOC)
777 		return 0;
778 	/*
779 	 * x86 is special, but in a nice way. It uses a trampoline which
780 	 * enables the dcache if possible.
781 	 *
782 	 * For now, other archs use relocate_code(), which is implemented
783 	 * similarly for all archs. When we do generic relocation, hopefully
784 	 * we can make all archs enable the dcache prior to relocation.
785 	 */
786 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
787 	/*
788 	 * SDRAM and console are now initialised. The final stack can now
789 	 * be setup in SDRAM. Code execution will continue in Flash, but
790 	 * with the stack in SDRAM and Global Data in temporary memory
791 	 * (CPU cache)
792 	 */
793 	arch_setup_gd(gd->new_gd);
794 # if CONFIG_IS_ENABLED(X86_64)
795 		board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
796 # else
797 		board_init_f_r_trampoline(gd->start_addr_sp);
798 # endif
799 #else
800 	relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
801 #endif
802 
803 	return 0;
804 }
805 #endif
806 
807 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
initf_bootstage(void)808 static int initf_bootstage(void)
809 {
810 	bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
811 			IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
812 	int ret;
813 
814 	ret = bootstage_init(!from_spl);
815 	if (ret)
816 		return ret;
817 	if (from_spl) {
818 		ret = bootstage_unstash_default();
819 		if (ret && ret != -ENOENT) {
820 			debug("Failed to unstash bootstage: err=%d\n", ret);
821 			return ret;
822 		}
823 	}
824 
825 	bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
826 
827 	return 0;
828 }
829 
initf_dm(void)830 static int initf_dm(void)
831 {
832 	int ret;
833 
834 	if (!CONFIG_IS_ENABLED(SYS_MALLOC_F))
835 		return 0;
836 
837 	bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
838 	ret = dm_init_and_scan(true);
839 	if (ret)
840 		return ret;
841 
842 	ret = dm_autoprobe();
843 	if (ret)
844 		return ret;
845 	bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
846 
847 	if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
848 		ret = dm_timer_init();
849 		if (ret)
850 			return ret;
851 	}
852 
853 	return 0;
854 }
855 
856 /* Architecture-specific memory reservation */
reserve_arch(void)857 __weak int reserve_arch(void)
858 {
859 	return 0;
860 }
861 
checkcpu(void)862 __weak int checkcpu(void)
863 {
864 	return 0;
865 }
866 
clear_bss(void)867 __weak int clear_bss(void)
868 {
869 	return 0;
870 }
871 
initf_upl(void)872 static int initf_upl(void)
873 {
874 	struct upl *upl;
875 	int ret;
876 
877 	if (!IS_ENABLED(CONFIG_UPL_IN) || !(gd->flags & GD_FLG_UPL))
878 		return 0;
879 
880 	upl = malloc(sizeof(struct upl));
881 	if (upl)
882 		ret = upl_read_handoff(upl, oftree_default());
883 	if (ret) {
884 		printf("UPL handoff: read failure (err=%dE)\n", ret);
885 		return ret;
886 	}
887 	gd_set_upl(upl);
888 
889 	return 0;
890 }
891 
initcall_run_f(void)892 static void initcall_run_f(void)
893 {
894 	/*
895 	 * Please do not add logic to this function (variables, if (), etc.).
896 	 * For simplicity it should remain an ordered list of function calls.
897 	 */
898 	INITCALL(setup_mon_len);
899 #if CONFIG_IS_ENABLED(OF_CONTROL)
900 	INITCALL(fdtdec_setup);
901 #endif
902 #if CONFIG_IS_ENABLED(TRACE_EARLY)
903 	INITCALL(trace_early_init);
904 #endif
905 	INITCALL(initf_malloc);
906 	INITCALL(initf_upl);
907 	INITCALL(log_init);
908 	INITCALL(initf_bootstage); /* uses its own timer, so does not need DM */
909 	INITCALL(event_init);
910 	INITCALL(bloblist_maybe_init);
911 	INITCALL(setup_spl_handoff);
912 #if CONFIG_IS_ENABLED(CONSOLE_RECORD_INIT_F)
913 	INITCALL(console_record_init);
914 #endif
915 	INITCALL_EVT(EVT_FSP_INIT_F);
916 	INITCALL(arch_cpu_init);	/* basic arch cpu dependent setup */
917 	INITCALL(mach_cpu_init);	/* SoC/machine dependent CPU setup */
918 	INITCALL(initf_dm);
919 #if CONFIG_IS_ENABLED(BOARD_EARLY_INIT_F)
920 	INITCALL(board_early_init_f);
921 #endif
922 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
923 	/* get CPU and bus clocks according to the environment variable */
924 	INITCALL(get_clocks);		/* get CPU and bus clocks (etc.) */
925 #endif
926 #if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
927 	INITCALL(timer_init);		/* initialize timer */
928 #endif
929 #if CONFIG_IS_ENABLED(BOARD_POSTCLK_INIT)
930 	INITCALL(board_postclk_init);
931 #endif
932 	INITCALL(env_init);		/* initialize environment */
933 	INITCALL(init_baud_rate);	/* initialze baudrate settings */
934 	INITCALL(serial_init);		/* serial communications setup */
935 	INITCALL(console_init_f);	/* stage 1 init of console */
936 	INITCALL(display_options);	/* say that we are here */
937 	INITCALL(display_text_info);	/* show debugging info if required */
938 	INITCALL(checkcpu);
939 #if CONFIG_IS_ENABLED(SYSRESET)
940 	INITCALL(print_resetinfo);
941 #endif
942 	/* display cpu info (and speed) */
943 #if CONFIG_IS_ENABLED(DISPLAY_CPUINFO)
944 	INITCALL(print_cpuinfo);
945 #endif
946 #if CONFIG_IS_ENABLED(DTB_RESELECT)
947 	INITCALL(embedded_dtb_select);
948 #endif
949 #if CONFIG_IS_ENABLED(DISPLAY_BOARDINFO)
950 	INITCALL(show_board_info);
951 #endif
952 	WATCHDOG_INIT();
953 	INITCALL_EVT(EVT_MISC_INIT_F);
954 	WATCHDOG_RESET();
955 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
956 	INITCALL(init_func_i2c);
957 #endif
958 	INITCALL(announce_dram_init);
959 	INITCALL(dram_init);		/* configure available RAM banks */
960 #if CONFIG_IS_ENABLED(POST)
961 	INITCALL(post_init_f);
962 #endif
963 	WATCHDOG_RESET();
964 #if defined(CFG_SYS_DRAM_TEST)
965 	INITCALL(testdram);
966 #endif /* CFG_SYS_DRAM_TEST */
967 	WATCHDOG_RESET();
968 #if CONFIG_IS_ENABLED(POST)
969 	INITCALL(init_post);
970 #endif
971 	WATCHDOG_RESET();
972 	/*
973 	 * Now that we have DRAM mapped and working, we can
974 	 * relocate the code and continue running from DRAM.
975 	 *
976 	 * Reserve memory at end of RAM for (top down in that order):
977 	 *  - area that won't get touched by U-Boot and Linux (optional)
978 	 *  - kernel log buffer
979 	 *  - protected RAM
980 	 *  - LCD framebuffer
981 	 *  - monitor code
982 	 *  - board info struct
983 	 */
984 	INITCALL(setup_dest_addr);
985 #if CONFIG_IS_ENABLED(OF_BOARD_FIXUP) && \
986     !CONFIG_IS_ENABLED(OF_INITIAL_DTB_READONLY)
987 	INITCALL(fix_fdt);
988 #endif
989 #ifdef CFG_PRAM
990 	INITCALL(reserve_pram);
991 #endif
992 	INITCALL(reserve_round_4k);
993 	INITCALL(setup_relocaddr_from_bloblist);
994 	INITCALL(arch_reserve_mmu);
995 	INITCALL(reserve_video);
996 	INITCALL(reserve_trace);
997 	INITCALL(reserve_uboot);
998 	INITCALL(reserve_malloc);
999 	INITCALL(reserve_board);
1000 	INITCALL(reserve_global_data);
1001 	INITCALL(reserve_fdt);
1002 #if CONFIG_IS_ENABLED(OF_BOARD_FIXUP) && \
1003     CONFIG_IS_ENABLED(OF_INITIAL_DTB_READONLY)
1004 	INITCALL(reloc_fdt);
1005 	INITCALL(fix_fdt);
1006 #endif
1007 	INITCALL(reserve_bootstage);
1008 	INITCALL(reserve_bloblist);
1009 	INITCALL(reserve_arch);
1010 	INITCALL(reserve_stacks);
1011 	INITCALL(dram_init_banksize);
1012 	INITCALL(show_dram_config);
1013 	WATCHDOG_RESET();
1014 	INITCALL(setup_bdinfo);
1015 	INITCALL(display_new_sp);
1016 	WATCHDOG_RESET();
1017 #if !CONFIG_IS_ENABLED(OF_BOARD_FIXUP) || \
1018     !CONFIG_IS_ENABLED(INITIAL_DTB_READONLY)
1019 	INITCALL(reloc_fdt);
1020 #endif
1021 	INITCALL(reloc_bootstage);
1022 	INITCALL(reloc_bloblist);
1023 	INITCALL(setup_reloc);
1024 #if CONFIG_IS_ENABLED(X86) || CONFIG_IS_ENABLED(ARC)
1025 	INITCALL(copy_uboot_to_ram);
1026 	INITCALL(do_elf_reloc_fixups);
1027 #endif
1028 	INITCALL(clear_bss);
1029 	/*
1030 	 * Deregister all cyclic functions before relocation, so that
1031 	 * gd->cyclic_list does not contain any references to pre-relocation
1032 	 * devices. Drivers will register their cyclic functions anew when the
1033 	 * devices are probed again.
1034 	 *
1035 	 * This should happen as late as possible so that the window where a
1036 	 * watchdog device is not serviced is as small as possible.
1037 	 */
1038 	INITCALL(cyclic_unregister_all);
1039 #if !CONFIG_IS_ENABLED(ARM) && !CONFIG_IS_ENABLED(SANDBOX)
1040 	INITCALL(jump_to_copy);
1041 #endif
1042 }
1043 
board_init_f(ulong boot_flags)1044 void board_init_f(ulong boot_flags)
1045 {
1046 	struct board_f boardf;
1047 
1048 	gd->flags = boot_flags;
1049 	gd->flags &= ~GD_FLG_HAVE_CONSOLE;
1050 	gd->boardf = &boardf;
1051 
1052 	initcall_run_f();
1053 
1054 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1055 		!defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1056 		!defined(CONFIG_ARC)
1057 	/* NOTREACHED - jump_to_copy() does not return */
1058 	hang();
1059 #endif
1060 }
1061 
1062 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1063 /*
1064  * For now this code is only used on x86.
1065  *
1066  * Run init functions which are run when U-Boot is executing from Flash with a
1067  * semi-limited 'C' environment.
1068  * The following limitations must be considered when implementing an
1069  * '_f_r' function:
1070  *  - 'static' variables are read-only
1071  *  - Global Data (gd->xxx) is read/write
1072  *
1073  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1074  * supported).  It _should_, if possible, copy global data to RAM and
1075  * initialise the CPU caches (to speed up the relocation process)
1076  *
1077  * NOTE: At present only x86 uses this route, but it is intended that
1078  * all archs will move to this when generic relocation is implemented.
1079  */
initcall_run_f_r(void)1080 static void initcall_run_f_r(void)
1081 {
1082 #if !CONFIG_IS_ENABLED(X86_64)
1083 	INITCALL(init_cache_f_r);
1084 #endif
1085 }
1086 
board_init_f_r(void)1087 void board_init_f_r(void)
1088 {
1089 	initcall_run_f_r();
1090 
1091 	/*
1092 	 * The pre-relocation drivers may be using memory that has now gone
1093 	 * away. Mark serial as unavailable - this will fall back to the debug
1094 	 * UART if available.
1095 	 *
1096 	 * Do the same with log drivers since the memory may not be available.
1097 	 */
1098 	gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1099 #ifdef CONFIG_TIMER
1100 	gd->timer = NULL;
1101 #endif
1102 
1103 	/*
1104 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1105 	 * Transfer execution from Flash to RAM by calculating the address
1106 	 * of the in-RAM copy of board_init_r() and calling it
1107 	 */
1108 	(board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1109 
1110 	/* NOTREACHED - board_init_r() does not return */
1111 	hang();
1112 }
1113 #endif /* CONFIG_X86 */
1114