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Searched refs:B (Results 1 – 25 of 195) sorted by relevance

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/arch/arm/dts/
A Dat91sam9x5_macb1.dtsi20 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
21 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
22 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
23 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
24 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
25 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
26 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
27 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
28 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
29 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
A Dat91sam9x5_usart3.dtsi24 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
25 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
30 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
35 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
40 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
A Dcn9132-db-B.dts6 #include "cn9131-db-B.dts"
10 model = "Marvell CN9132 development board (CP NAND) setup(B)";
11 compatible = "marvell,cn9132-db-B", "marvell,armada-ap806-quad",
A Dsama5d3_gmac.dtsi31 … <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
32 … AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
33 … AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
34 … AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
35 … AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
36 … AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
37 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
38 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
61 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
A Darmada-common.dtsi19 #define APPEND_NX(A, B) A ##-## B argument
20 #define APPEND(A, B) APPEND_NX(A, B) argument
A Dat91sam9263.dtsi409 /* A B */
453 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
458 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
471 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
476 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
491 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
585 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
586 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
592 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
593 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
[all …]
A Dfsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi10 * LS1028A QDS boards with lane B rework require two cards for the 4 switch
11 * ports, QDS boards without the lane B rework only require one card.
16 * - if the QDS has had lane B rework, it is 1st port in slot 2,
26 * The following DTS assumes QDS lane B rework and DIP SW5[1-3] = 000b. Two
A Dat91sam9260.dtsi411 /* A B */
557 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
558 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
559 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
560 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
561 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
562 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
563 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
569 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
570 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
[all …]
A Dzynqmp-smk-k26-revA.dts3 * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A
14 model = "ZynqMP SMK-K26 Rev2/1/B/A";
A Dcn9130-crb-B.dts9 model = "CN9130-CRB-B";
10 compatible = "marvell,cn9130-crb-B",
A Dat91sam9n12.dtsi497 /* A B C */
593 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
598 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
606 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
611 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
616 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
671 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
672 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
673 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
678 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
[all …]
A Dtegra20-medcom-wide.dts60 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
62 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
A Dtegra20-tec.dts72 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
74 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
A Dimx7d-colibri-eval-v3.dts22 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
41 /* Colibri PWM<B> */
A Dcn9130-db-dev-info.dtsi35 options = "0xE", "CP0_NAND PIDI BW-8bit, PS-4KB, ECC-4bit\t(supported configuration: B)",
36 "0xF", "CP0_NAND PIDI BW-8bit, PS-4KB, ECC-8bit\t(supported configuration: B)",
A Dcn9131-db-B.dts6 #include "cn9130-db-B.dts"
10 model = "Marvell CN9131 development board (CP NAND) setup(B)";
A Dzynqmp-zcu104-revA.dts157 * IIC_EEPROM 1kB memory which uses 256B blocks
159 * 0 - 256B address 0x54
160 * 256B - 512B address 0x55
161 * 512B - 768B address 0x56
162 * 768B - 1024B address 0x57
A Dat91-sam9x60_curiosity.dts295 <AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */
296 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */
297 …RIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */
298 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */
299 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */
300 …IPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */
A Dsam9x60ek.dts272 <AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */
273 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */
274 …RIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */
275 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */
276 …ERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */
277 …IPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */
A Dsama5d3_can.dtsi28 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
29 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
/arch/arm/lib/
A Duldivmod.S39 @ Test if B == 0
42 @ Test if B is power of 2: (B & (B - 1)) == 0
62 @ D_1 = clz B
70 @ B <<= (clz B - clz A)
101 @ B <<= 4
115 @ B <<= 1
126 @ if A >= B
130 @ A -= B
146 @ B >>= 1
171 @ R = A & (B - 1)
[all …]
/arch/x86/include/asm/arch-baytrail/acpi/
A Dirqroute.h17 PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
20 PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
22 PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
23 PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
26 PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D)
/arch/x86/include/asm/arch-quark/acpi/
A Dirqroute.h11 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_23, A, B, C, D)
14 PCIE_BRIDGE_DEV(RP, QUARK_DEV_23, A, B, C, D)
/arch/arm/mach-bcm283x/
A DKconfig69 the A, A+, B, B+, Compute Module, and Zero. This option cannot
96 the RPi 2 model B.
99 Model B, when run in 32-bit mode, provided you have configured the
119 the RPi 3 model B, in AArch32 (32-bit) mode.
135 the RPi 3 model B, in AArch64 (64-bit) mode.
163 the RPi 4 model B, in AArch32 (32-bit) mode.
182 the RPi 4 model B, in AArch64 (64-bit) mode.
207 the RPi 4 model B, in AArch64 (64-bit) mode.
/arch/mips/mach-octeon/include/mach/
A Docteon-model.h234 #define __OCTEON_IS_MODEL_COMPILE__(A, B) \ argument
237 typeof(B) b = (B); \

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