Home
last modified time | relevance | path

Searched refs:CLK_DIV_CAM_VAL (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos4.c72 writel(CLK_DIV_CAM_VAL, &clk->div_cam); in system_clock_init()
A Dexynos4_setup.h274 #define CLK_DIV_CAM_VAL ((FIMC3_LCLK_RATIO << 12) \ macro

Completed in 6 milliseconds