Home
last modified time | relevance | path

Searched refs:CLK_DIV_PERIC4_VAL (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dexynos5_setup.h689 #define CLK_DIV_PERIC4_VAL NOT_AVAILABLE macro
869 #define CLK_DIV_PERIC4_VAL ((SPI2_PRE_RATIO << 24) \ macro
A Dclock_init_exynos5.c955 writel(CLK_DIV_PERIC4_VAL, &clk->div_peric4); in exynos5420_system_clock_init()

Completed in 7 milliseconds