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Searched refs:CLK_SRC_TOP5_VAL (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dexynos5_setup.h592 #define CLK_SRC_TOP5_VAL NOT_AVAILABLE macro
784 #define CLK_SRC_TOP5_VAL 0x11111101 macro
A Dclock_init_exynos5.c928 writel(CLK_SRC_TOP5_VAL, &clk->src_top5); in exynos5420_system_clock_init()

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