| /arch/arm/mach-tegra/ |
| A D | clock.c | 365 if (parent == CLOCK_ID_DISPLAY || parent == CLOCK_ID_DISPLAY2) in clock_get_periph_rate()
475 if (parent == CLOCK_ID_DISPLAY || parent == CLOCK_ID_DISPLAY2) in clock_adjust_periph_pll_div()
707 if (clkid == CLOCK_ID_DISPLAY) in clock_set_rate()
799 pll_rate[CLOCK_ID_DISPLAY] = clock_get_rate(CLOCK_ID_DISPLAY); in clock_init()
814 debug("PLLD = %d\n", pll_rate[CLOCK_ID_DISPLAY]); in clock_init()
|
| /arch/arm/mach-tegra/tegra114/ |
| A D | clock.c | 673 return CLOCK_ID_DISPLAY; in clk_id_to_pll_id()
713 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
718 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
724 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
746 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
749 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
|
| /arch/arm/mach-tegra/tegra30/ |
| A D | clock.c | 657 return CLOCK_ID_DISPLAY; in clk_id_to_pll_id()
690 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
694 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
699 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
714 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
717 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
|
| /arch/arm/include/asm/arch-tegra20/ |
| A D | clock-tables.h | 20 CLOCK_ID_DISPLAY, enumerator
|
| /arch/arm/mach-tegra/tegra124/ |
| A D | clock.c | 856 return CLOCK_ID_DISPLAY; in clk_id_to_pll_id()
896 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
901 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
907 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
929 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
932 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
1172 source = get_periph_clock_source(PERIPH_ID_DISP1, CLOCK_ID_DISPLAY, in clock_set_display_rate()
1175 clock_set_rate(CLOCK_ID_DISPLAY, best_n, best_m, best_p, cpcon); in clock_set_display_rate()
|
| /arch/arm/mach-tegra/tegra210/ |
| A D | clock.c | 943 return CLOCK_ID_DISPLAY; in clk_id_to_pll_id()
1004 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
1017 clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); in clock_early_init()
1022 clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); in clock_early_init()
1028 clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); in clock_early_init()
1032 clock_set_rate(CLOCK_ID_DISPLAY, 96, 2, 0, 12); in clock_early_init()
1036 clock_set_rate(CLOCK_ID_DISPLAY, 96, 4, 0, 0); in clock_early_init()
1062 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()
|
| /arch/arm/include/asm/arch-tegra114/ |
| A D | clock-tables.h | 19 CLOCK_ID_DISPLAY, enumerator
|
| /arch/arm/include/asm/arch-tegra30/ |
| A D | clock-tables.h | 19 CLOCK_ID_DISPLAY, enumerator
|
| /arch/arm/include/asm/arch-tegra124/ |
| A D | clock-tables.h | 20 CLOCK_ID_DISPLAY, enumerator
|
| /arch/arm/include/asm/arch-tegra210/ |
| A D | clock-tables.h | 20 CLOCK_ID_DISPLAY, enumerator
|
| /arch/arm/mach-tegra/tegra20/ |
| A D | clock.c | 605 return CLOCK_ID_DISPLAY; in clk_id_to_pll_id()
|