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Searched refs:CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_LSB (Results 1 – 1 of 1) sorted by relevance

/arch/mips/mach-ath79/qca956x/
A Dclk.c140 #define CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_LSB 4 macro
143 (((x) << CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_LSB) & CPU_DDR_CLOCK_CONTROL_AHB_PLL_BYPASS_MASK)

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