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Searched refs:CSR_MHCR (Results 1 – 2 of 2) sorted by relevance

/arch/riscv/cpu/th1520/
A Dcache.c10 #define CSR_MHCR 0x7c1 macro
17 csr_write(CSR_MHCR, csr_read(CSR_MHCR) | CSR_MHCR_IE); in icache_enable()
22 csr_write(CSR_MHCR, csr_read(CSR_MHCR) | CSR_MHCR_DE); in dcache_enable()
27 return (csr_read(CSR_MHCR) & CSR_MHCR_IE) != 0; in icache_status()
32 return (csr_read(CSR_MHCR) & CSR_MHCR_DE) != 0; in dcache_status()
A Dspl.c31 #define CSR_MHCR 0x7c1 macro
157 csr_write(CSR_MHCR, CSR_MHCR_WBR | CSR_MHCR_BTB | CSR_MHCR_BPE | in harts_early_init()

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