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Searched refs:CVMX_MAX_NODES (Results 1 – 22 of 22) sorted by relevance

/arch/mips/mach-octeon/
A Dcvmx-helper-pki.c54 bool cvmx_pki_dflt_init[CVMX_MAX_NODES] = { [0 ... CVMX_MAX_NODES - 1] = 1 };
56 static bool cvmx_pki_dflt_bp_en[CVMX_MAX_NODES] = { [0 ... CVMX_MAX_NODES - 1] =
63 struct cvmx_pki_pool_config pki_dflt_pool[CVMX_MAX_NODES] = {
64 [0 ... CVMX_MAX_NODES -
68 struct cvmx_pki_aura_config pki_dflt_aura[CVMX_MAX_NODES] = {
69 [0 ... CVMX_MAX_NODES -
74 [0 ... CVMX_MAX_NODES - 1] = { .parm_cfg = { .lenerr_en = 1,
84 struct cvmx_pki_qpg_config pki_dflt_qpg[CVMX_MAX_NODES];
85 struct cvmx_pki_pkind_config pki_dflt_pkind[CVMX_MAX_NODES];
86 u64 pkind_style_map[CVMX_MAX_NODES][CVMX_PKI_NUM_PKIND] = {
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A Dbootoctlinux.c224 static int octeon_parse_nodes(u64 values[CVMX_MAX_NODES], in octeon_parse_nodes() argument
235 } while (++node < CVMX_MAX_NODES && *sep == ','); in octeon_parse_nodes()
255 u64 node_values[CVMX_MAX_NODES]; in octeon_parse_bootopts()
345 for (j = 0; j < CVMX_MAX_NODES; j++) { in octeon_parse_bootopts()
420 for (i = 0; i < CVMX_MAX_NODES; i++) in do_bootoctlinux()
423 for (i = 0; i < CVMX_MAX_NODES; i++) { in do_bootoctlinux()
A Dcvmx-pki-resources.c33 static s32 cvmx_pki_style_refcnt[CVMX_MAX_NODES][CVMX_PKI_NUM_INTERNAL_STYLE];
125 if (node >= CVMX_MAX_NODES) { in cvmx_pki_cluster_grp_alloc()
A Dcvmx-pko3-resources.c81 cvmx_pko3_dq_params_t *__cvmx_pko3_dq_params[CVMX_MAX_NODES];
A Dcvmx-ilk.c51 unsigned short cvmx_ilk_lane_mask[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF] = {
52 [0 ... CVMX_MAX_NODES - 1] = { 0x000f, 0x00f0 }
55 int cvmx_ilk_chans[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF] = {
56 [0 ... CVMX_MAX_NODES - 1] = { 8, 8 }
59 static cvmx_ilk_intf_t cvmx_ilk_intf_cfg[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF];
A Dcvmx-helper-cfg.c46 struct cvmx_cfg_port_param cvmx_cfg_port[CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE]
61 __cvmx_pko_queue_static_config[CVMX_MAX_NODES];
739 for (node = 0; node < CVMX_MAX_NODES; node++) { in __cvmx_helper_init_port_valid()
824 for (node = 0; node < CVMX_MAX_NODES; node++) { in cvmx_init_port_cfg()
A Dcvmx-cmd-queue.c66 __cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptrs[CVMX_MAX_NODES];
A Dcvmx-pko3-queue.c130 CVMX_PKO3_IPD_NUM_MAX * CVMX_MAX_NODES; in __cvmx_pko3_dq_table_init()
152 CVMX_MAX_NODES, in __cvmx_pko3_dq_table_setup()
A Dcvmx-fpa.c100 static cvmx_fpa3_poolx_info_t *cvmx_fpa3_pool_info[CVMX_MAX_NODES];
101 static cvmx_fpa3_aurax_info_t *cvmx_fpa3_aura_info[CVMX_MAX_NODES];
A Dcvmx-helper-bgx.c2021 [CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE] in __cvmx_helper_bgx_xaui_enable()
2023 [0 ... CVMX_MAX_NODES - in __cvmx_helper_bgx_xaui_enable()
2338 [CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE] in __cvmx_helper_bgx_mixed_enable()
2340 [0 ... CVMX_MAX_NODES - in __cvmx_helper_bgx_mixed_enable()
A Dcvmx-helper.c345 const struct iface_ops *iface_node_ops[CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE];
359 static struct cvmx_iface cvmx_interfaces[CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE];
A Dcvmx-helper-pko3.c65 static cvmx_fpa3_gaura_t __cvmx_pko3_aura[CVMX_MAX_NODES];
A Dcvmx-pcie.c75 bool pcie_link_initialized[CVMX_MAX_NODES][CVMX_PCIE_MAX_PORTS];
A Docteon_qlm.c2568 static u8 ref_clk_cn78xx[CVMX_MAX_NODES][8][R_NUM_LANE_MODES] = {
/arch/mips/mach-octeon/include/mach/
A Dcvmx-helper-pki.h104 extern bool cvmx_pki_dflt_init[CVMX_MAX_NODES];
106 extern struct cvmx_pki_pool_config pki_dflt_pool[CVMX_MAX_NODES];
107 extern struct cvmx_pki_aura_config pki_dflt_aura[CVMX_MAX_NODES];
108 extern struct cvmx_pki_style_config pki_dflt_style[CVMX_MAX_NODES];
109 extern struct cvmx_pki_pkind_config pki_dflt_pkind[CVMX_MAX_NODES];
110 extern u64 pkind_style_map[CVMX_MAX_NODES][CVMX_PKI_NUM_PKIND];
111 extern struct cvmx_pki_sso_grp_config pki_dflt_sso_grp[CVMX_MAX_NODES];
A Dbootoct_cmd.h20 int num_cores[CVMX_MAX_NODES]; /** number of cores */
21 int num_skipped[CVMX_MAX_NODES];/** number of skipped cores */
A Dcvmx-ilk.h53 extern unsigned short cvmx_ilk_lane_mask[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF];
64 extern int cvmx_ilk_chans[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF];
A Dcvmx-helper-cfg.h183 extern cvmx_user_static_pko_queue_config_t __cvmx_pko_queue_static_config[CVMX_MAX_NODES];
185 extern struct cvmx_cfg_port_param cvmx_cfg_port[CVMX_MAX_NODES][CVMX_HELPER_MAX_IFACE]
A Dcvmx-regs.h20 #define CVMX_MAX_NODES (1 << CVMX_NODE_BITS) macro
21 #define CVMX_NODE_MASK (CVMX_MAX_NODES - 1)
A Dcvmx-cmd-queue.h135 extern __cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptrs[CVMX_MAX_NODES];
A Dcvmx-pko3.h432 extern cvmx_pko3_dq_params_t *__cvmx_pko3_dq_params[CVMX_MAX_NODES];
451 if (cvmx_likely(node < CVMX_MAX_NODES)) in cvmx_pko3_dq_parameters()
A Dcvmx-coremask.h127 (node) >= 0 && (node) < CVMX_MAX_NODES; \

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