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Searched refs:DDR3_PLL (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-keystone/include/mach/
A Dclock-k2e.h25 #define DDR3_PLL_200 {DDR3_PLL, 4, 1, 2}
26 #define DDR3_PLL_400 {DDR3_PLL, 16, 1, 4}
27 #define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
28 #define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
A Dclock-k2l.h35 #define DDR3_PLL_200 {DDR3_PLL, 4, 1, 2}
36 #define DDR3_PLL_400 {DDR3_PLL, 16, 1, 4}
37 #define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
38 #define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
A Dclock.h31 #define DDR3_PLL DDR3A_PLL macro
/arch/arm/mach-keystone/
A Dcmd_clock.c41 cmd_pll_data.pll = DDR3_PLL; in do_pll_cmd()

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