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Searched refs:DDR4 (Results 1 – 23 of 23) sorted by relevance

/arch/arm/include/asm/arch-rockchip/
A Dsdram.h10 DDR4 = 0, enumerator
/arch/arm/dts/
A Dsocfpga_n5x_socdk-u-boot.dtsi18 * Memory type: DDR4 (non-interleaving mode)
A Dk3-am654-base-board-ddr4-1600MTs.dtsi7 * Memory Type: DDR4
A Dzynqmp-sc-vn-p-b2197-00-revA.dtso200 /* J77 - OE for u1783@50 + 7 - 320MHz - DDR4 */
A Dzynqmp-zcu670-revA.dts530 /* DDR4 SODIMM */
A Dzynqmp-zcu670-revB.dts530 /* DDR4 SODIMM */
A Dzynqmp-zcu208-revA.dts557 /* DDR4 SODIMM */
A Dzynqmp-zcu216-revA.dts567 /* DDR4 SODIMM */
A Dzynqmp-zcu111-revA.dts547 /* DDR4 SODIMM */
A Dzynqmp-zcu106-revA.dts677 /* DDR4 SODIMM */
A Dzynqmp-zcu102-revA.dts666 /* DDR4 SODIMM */
A Dk3-am62-phycore-som-ddr4-2gb.dtsi6 * DDR Type: DDR4
A Dk3-am625-beagleplay-ddr4-1600MTs.dtsi12 * DDR Type: DDR4
A Dk3-am62x-sk-ddr4-1600MTs.dtsi6 * DDR Type: DDR4
A Dk3-am64-evm-ddr4-1600MTs.dtsi6 * DDR Type: DDR4
A Dk3-am64-phycore-som-ddr4-2gb.dtsi6 * DDR Type: DDR4
/arch/arm/cpu/armv8/fsl-layerscape/doc/
A DREADME.soc24 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
68 - 1 64-bit DDR4 SDRAM memory controller with ECC
95 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
96 - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by
180 - One 64-bit DDR4 SDRAM memory controllers with ECC and interleaving
222 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
223 - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by
291 Two 64-bit 3.2GT/s DDR4 SDRAM memory controllers with ECC.
351 - One 32-bit DDR3L/DDR4 SDRAM memory controller with ECC
397 One 64-bit 2.9GT/s DDR4 SDRAM memory controllers with ECC.
/arch/arm/mach-mediatek/
A DKconfig111 chip and several DDR3 and DDR4 options.
120 chip and several DDR3 and DDR4 options.
/arch/arm/mach-mvebu/
A DKconfig106 config DDR4 config
107 bool "Support Marvell DDR4 Training driver"
201 select DDR4
/arch/arm/mach-rockchip/px30/
A DKconfig46 * up to 4GB DDR4
/arch/arm/mach-rockchip/
A Dsdram.c421 if (dram_type == DDR4) { in rockchip_sdram_size()
/arch/arm/mach-imx/imx8m/
A DKconfig179 bool "imx8mn DDR4 EVK board"
/arch/arm/mach-sunxi/
A DKconfig670 bool "DDR4 boot0 timings on the A133 DRAM controller"
674 This option is the DDR4 timing used by the boot0 on A133 devices
675 which use a DDR4 timing.

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