DDR_PLL_CONFIG_RANGE_VAL (reference) in projects: arch

Searched refs:DDR_PLL_CONFIG_RANGE_VAL (Results 1 – 1 of 1) sorted by relevance

/arch/mips/mach-ath79/qca956x/
A D	clk.c	`165 #define DDR_PLL_CONFIG_RANGE_VAL DDR_PLL_CONFIG_RANGE_SET(0) macro 265 ddr_pll_set(DDR_PLL_CONFIG_RANGE_MASK, DDR_PLL_CONFIG_RANGE_VAL); in qca956x_pll_init()`

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