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Searched refs:DMC_CONCONTROL_TIMEOUT_LEVEL0 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos5.c250 DMC_CONCONTROL_TIMEOUT_LEVEL0 |
355 DMC_CONCONTROL_TIMEOUT_LEVEL0 |
458 DMC_CONCONTROL_TIMEOUT_LEVEL0 |
A Dexynos5_setup.h107 #define DMC_CONCONTROL_TIMEOUT_LEVEL0 (0xFFF << 16) macro

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