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Searched refs:DMC_MEMCONTROL_DPWRDN_DISABLE (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos5.c231 DMC_MEMCONTROL_DPWRDN_DISABLE |
334 DMC_MEMCONTROL_DPWRDN_DISABLE |
437 DMC_MEMCONTROL_DPWRDN_DISABLE |
A Dexynos5_setup.h26 #define DMC_MEMCONTROL_DPWRDN_DISABLE (0 << 1) macro

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