| /arch/arm/dts/ |
| A D | stm32h750i-art-pi-u-boot.dtsi | 42 <STM32_PINMUX('E', 0, AF12)>,
43 <STM32_PINMUX('E', 1, AF12)>,
44 <STM32_PINMUX('E', 7, AF12)>,
45 <STM32_PINMUX('E', 8, AF12)>,
46 <STM32_PINMUX('E', 9, AF12)>,
47 <STM32_PINMUX('E',10, AF12)>,
48 <STM32_PINMUX('E',11, AF12)>,
49 <STM32_PINMUX('E',12, AF12)>,
50 <STM32_PINMUX('E',13, AF12)>,
51 <STM32_PINMUX('E',14, AF12)>,
[all …]
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| A D | stm32h743i-disco-u-boot.dtsi | 43 <STM32_PINMUX('E', 0, AF12)>,
44 <STM32_PINMUX('E', 1, AF12)>,
45 <STM32_PINMUX('E', 7, AF12)>,
46 <STM32_PINMUX('E', 8, AF12)>,
47 <STM32_PINMUX('E', 9, AF12)>,
48 <STM32_PINMUX('E',10, AF12)>,
49 <STM32_PINMUX('E',11, AF12)>,
50 <STM32_PINMUX('E',12, AF12)>,
51 <STM32_PINMUX('E',13, AF12)>,
52 <STM32_PINMUX('E',14, AF12)>,
[all …]
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| A D | stm32h743i-eval-u-boot.dtsi | 43 <STM32_PINMUX('E', 0, AF12)>,
44 <STM32_PINMUX('E', 1, AF12)>,
45 <STM32_PINMUX('E', 7, AF12)>,
46 <STM32_PINMUX('E', 8, AF12)>,
47 <STM32_PINMUX('E', 9, AF12)>,
48 <STM32_PINMUX('E',10, AF12)>,
49 <STM32_PINMUX('E',11, AF12)>,
50 <STM32_PINMUX('E',12, AF12)>,
51 <STM32_PINMUX('E',13, AF12)>,
52 <STM32_PINMUX('E',14, AF12)>,
[all …]
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| A D | stm32h747i-disco-u-boot.dtsi | 46 <STM32_PINMUX('E', 0, AF12)>,
47 <STM32_PINMUX('E', 1, AF12)>,
48 <STM32_PINMUX('E', 7, AF12)>,
49 <STM32_PINMUX('E', 8, AF12)>,
50 <STM32_PINMUX('E', 9, AF12)>,
51 <STM32_PINMUX('E',10, AF12)>,
52 <STM32_PINMUX('E',11, AF12)>,
53 <STM32_PINMUX('E',12, AF12)>,
54 <STM32_PINMUX('E',13, AF12)>,
55 <STM32_PINMUX('E',14, AF12)>,
[all …]
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| A D | stm32f746-disco-u-boot.dtsi | 100 <STM32_PINMUX('E',15, AF12)>, /* D12 */
101 <STM32_PINMUX('E',14, AF12)>, /* D11 */
102 <STM32_PINMUX('E',13, AF12)>, /* D10 */
103 <STM32_PINMUX('E',12, AF12)>, /* D9 */
104 <STM32_PINMUX('E',11, AF12)>, /* D8 */
105 <STM32_PINMUX('E',10, AF12)>, /* D7 */
106 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
107 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
108 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
114 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
[all …]
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| A D | stm32f429-disco-u-boot.dtsi | 141 <STM32_PINMUX('E',15, AF12)>, /* D12 */
142 <STM32_PINMUX('E',14, AF12)>, /* D11 */
143 <STM32_PINMUX('E',13, AF12)>, /* D10 */
144 <STM32_PINMUX('E',12, AF12)>, /* D09 */
145 <STM32_PINMUX('E',11, AF12)>, /* D08 */
146 <STM32_PINMUX('E',10, AF12)>, /* D07 */
147 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
148 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
149 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
155 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
[all …]
|
| A D | stm32746g-eval-u-boot.dtsi | 101 <STM32_PINMUX('E',15, AF12)>, /* D12 */
102 <STM32_PINMUX('E',14, AF12)>, /* D11 */
103 <STM32_PINMUX('E',13, AF12)>, /* D10 */
104 <STM32_PINMUX('E',12, AF12)>, /* D9 */
105 <STM32_PINMUX('E',11, AF12)>, /* D8 */
106 <STM32_PINMUX('E',10, AF12)>, /* D7 */
107 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
108 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
109 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
117 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
[all …]
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| A D | stm32f769-disco-u-boot.dtsi | 104 <STM32_PINMUX('E',15, AF12)>, /* D12 */
105 <STM32_PINMUX('E',14, AF12)>, /* D11 */
106 <STM32_PINMUX('E',13, AF12)>, /* D10 */
107 <STM32_PINMUX('E',12, AF12)>, /* D9 */
108 <STM32_PINMUX('E',11, AF12)>, /* D8 */
109 <STM32_PINMUX('E',10, AF12)>, /* D7 */
110 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
111 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
112 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
120 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
[all …]
|
| A D | stm32429i-eval-u-boot.dtsi | 173 <STM32_PINMUX('E',15, AF12)>, /* D12 */
174 <STM32_PINMUX('E',14, AF12)>, /* D11 */
175 <STM32_PINMUX('E',13, AF12)>, /* D10 */
176 <STM32_PINMUX('E',12, AF12)>, /* D09 */
177 <STM32_PINMUX('E',11, AF12)>, /* D08 */
178 <STM32_PINMUX('E',10, AF12)>, /* D07 */
179 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
180 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
181 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
187 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
[all …]
|
| A D | stm32f469-disco-u-boot.dtsi | 177 <STM32_PINMUX('E',15, AF12)>, /* D12 */
178 <STM32_PINMUX('E',14, AF12)>, /* D11 */
179 <STM32_PINMUX('E',13, AF12)>, /* D10 */
180 <STM32_PINMUX('E',12, AF12)>, /* D09 */
181 <STM32_PINMUX('E',11, AF12)>, /* D08 */
182 <STM32_PINMUX('E',10, AF12)>, /* D07 */
183 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
184 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
185 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
191 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
[all …]
|
| A D | tegra20-lg-star.dts | 456 data-gpios = <&gpio TEGRA_GPIO(E, 0) GPIO_ACTIVE_HIGH>,
457 <&gpio TEGRA_GPIO(E, 1) GPIO_ACTIVE_HIGH>,
458 <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>,
459 <&gpio TEGRA_GPIO(E, 3) GPIO_ACTIVE_HIGH>,
460 <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>,
461 <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>,
462 <&gpio TEGRA_GPIO(E, 6) GPIO_ACTIVE_HIGH>,
463 <&gpio TEGRA_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
|
| A D | imx6qdl-dhcom-pdk2.dtsi | 103 * Disable led-5, because GPIO E is
110 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
241 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
283 * E: touchscreen
|
| A D | sun8i-h3-orangepi-plus2e.dts | 44 * The Orange Pi Plus 2E is an extended version of the Orange Pi PC Plus,
51 model = "Xunlong Orange Pi Plus 2E";
|
| A D | synquacer-sc2a11-developerbox.dts | 41 "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F",
|
| A D | imx8mp-dhcom-picoitx.dts | 6 * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E-SD-RTC-T-RGB-I-01D2
|
| A D | hi3798cv200-poplar.dts | 116 gpio-line-names = "GPIO-E", "",
|
| A D | tegra20-motorola-mot.dtsi | 41 reset-gpios = <&gpio TEGRA_GPIO(E, 3) GPIO_ACTIVE_LOW>;
325 enable-gpios = <&gpio TEGRA_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
|
| A D | imx6qdl-dhcom-drc02.dtsi | 48 "", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
|
| A D | imx8mp-toradex-smarc-dev.dts | 258 /* SMARC SER0, RS485. Optional M.2 KEY E */
|
| A D | imx8mp-dhcom-drc02.dts | 120 "", "", "", "", "", "", "DHCOM-E", "DRC02-Out1",
|
| /arch/x86/include/asm/arch-quark/acpi/ |
| A D | irqroute.h | 9 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_20, E, F, G, H), \
10 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_21, E, F, G, H), \
|
| /arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-global-resources.h | 66 #define TAG_INIT_PART(A, B, C, D, E, F, G, H) \ argument
68 (((u64)(D) & 0xff) << 32) | (((u64)(E) & 0xff) << 24) | (((u64)(F) & 0xff) << 16) | \
|
| /arch/arm/mach-rockchip/rk3568/ |
| A D | Kconfig | 53 bool "Radxa ZERO 3W/3E"
55 Radxa ZERO 3W/3E single board computers with a RK3566 SoC.
|
| /arch/mips/mach-mscc/ |
| A D | Kconfig | 74 bool "Micron MT41J128M16HA-15E:D (2Gbit DDR3, x16)"
|
| /arch/arm/mach-rockchip/rk3588/ |
| A D | Kconfig | 43 - PCIE M.2 E Key for RTL8852BE Wireless connection
115 PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
261 M.2 M-key and M.2 E-key connector
|