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Searched refs:EMIF1_BASE (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-omap2/
A Demif-common.c45 set_lpmode_selfrefresh(EMIF1_BASE); in force_emif_self_refresh()
52 if (base == EMIF1_BASE) in emif_num()
358 if ((base != EMIF1_BASE) || !is_dra76x()) in dra7_enable_ecc()
456 if (is_dra76x() && (base == EMIF1_BASE) && in dra7_ddr3_init()
1205 u32 base = (emif_nr == 1) ? EMIF1_BASE : EMIF2_BASE; in emif_get_device_details()
1235 emif_nr = (base == EMIF1_BASE) ? 1 : 2; in do_sdram_init()
1340 emif1_size = get_emif_mem_size(EMIF1_BASE); in dmm_init()
1523 struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; in sdram_init()
1545 do_sdram_init(EMIF1_BASE); in sdram_init()
1552 emif_post_init_config(EMIF1_BASE); in sdram_init()
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A Dclocks-common.c379 struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; in setup_dplls()
/arch/arm/mach-omap2/am33xx/
A Demif4.c88 if (get_emif_rev(EMIF1_BASE) == EMIF_4D5) in config_ddr()
/arch/arm/mach-omap2/omap5/
A Dsdram.c511 emif_nr = (base == EMIF1_BASE) ? 1 : 2; in do_ext_phy_settings_omap5()
549 emif_nr = (base == EMIF1_BASE) ? 1 : 2; in do_ext_phy_settings_dra7()
A Dhwinit.c126 struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; in do_io_settings()
314 if (emif_base == EMIF1_BASE) in config_data_eye_leveling_samples()
/arch/arm/mach-keystone/include/mach/
A Dhardware.h81 #define EMIF1_BASE KS2_DDR3A_EMIF_CTRL_BASE macro
/arch/arm/include/asm/
A Demif.h19 #ifndef EMIF1_BASE
20 #define EMIF1_BASE 0x4c000000 macro

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