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Searched refs:EPLL_CON0_MDIV_MASK (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/include/mach/
A Dclock.h1384 #define EPLL_CON0_MDIV_MASK 0x1ff macro
/arch/arm/mach-exynos/
A Dclock.c1281 EPLL_CON0_MDIV_MASK << EPLL_CON0_MDIV_SHIFT | in exynos5_set_epll_clk()

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