1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * linux/arch/powerpc/kernel/traps.c
4 *
5 * Copyright 2007 Freescale Semiconductor.
6 * Copyright (C) 2003 Motorola
7 * Modified by Xianghua Xiao(x.xiao@motorola.com)
8 *
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
13 *
14 * (C) Copyright 2000
15 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
16 */
17
18 /*
19 * This file handles the architecture-dependent parts of hardware exceptions
20 */
21
22 #include <asm/ppc.h>
23 #include <asm/global_data.h>
24 #include <asm/ptrace.h>
25 #include <command.h>
26 #include <init.h>
27 #include <irq_func.h>
28 #include <kgdb.h>
29 #include <asm/processor.h>
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 /* Returns 0 if exception not found and fixup otherwise. */
34 extern unsigned long search_exception_table(unsigned long);
35
36 /*
37 * End of addressable memory. This may be less than the actual
38 * amount of memory on the system if we're unable to keep all
39 * the memory mapped in.
40 */
41 #define END_OF_MEM (gd->ram_base + get_effective_memsize())
42
set_tsr(unsigned long val)43 static __inline__ void set_tsr(unsigned long val)
44 {
45 asm volatile("mtspr 0x150, %0" : : "r" (val));
46 }
47
get_esr(void)48 static __inline__ unsigned long get_esr(void)
49 {
50 unsigned long val;
51 asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
52 return val;
53 }
54
55 #define ESR_MCI 0x80000000
56 #define ESR_PIL 0x08000000
57 #define ESR_PPR 0x04000000
58 #define ESR_PTR 0x02000000
59 #define ESR_DST 0x00800000
60 #define ESR_DIZ 0x00400000
61 #define ESR_U0F 0x00008000
62
63 /*
64 * Trap & Exception support
65 */
66
print_backtrace(unsigned long * sp)67 static void print_backtrace(unsigned long *sp)
68 {
69 int cnt = 0;
70 unsigned long i;
71
72 printf("Call backtrace: ");
73 while (sp) {
74 if ((uint)sp > END_OF_MEM)
75 break;
76
77 i = sp[1];
78 if (cnt++ % 7 == 0)
79 printf("\n");
80 printf("%08lX ", i);
81 if (cnt > 32) break;
82 sp = (unsigned long *)*sp;
83 }
84 printf("\n");
85 }
86
show_regs(struct pt_regs * regs)87 void show_regs(struct pt_regs *regs)
88 {
89 int i;
90
91 printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
92 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
93 printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
94 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
95 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
96 regs->msr&MSR_IR ? 1 : 0,
97 regs->msr&MSR_DR ? 1 : 0);
98
99 printf("\n");
100 for (i = 0; i < 32; i++) {
101 if ((i % 8) == 0)
102 {
103 printf("GPR%02d: ", i);
104 }
105
106 printf("%08lX ", regs->gpr[i]);
107 if ((i % 8) == 7)
108 {
109 printf("\n");
110 }
111 }
112 }
113
_exception(int signr,struct pt_regs * regs)114 static void _exception(int signr, struct pt_regs *regs)
115 {
116 show_regs(regs);
117 print_backtrace((unsigned long *)regs->gpr[1]);
118 panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
119 }
120
CritcalInputException(struct pt_regs * regs)121 void CritcalInputException(struct pt_regs *regs)
122 {
123 panic("Critical Input Exception");
124 }
125
126 int machinecheck_count = 0;
127 int machinecheck_error = 0;
MachineCheckException(struct pt_regs * regs)128 void MachineCheckException(struct pt_regs *regs)
129 {
130 unsigned long fixup;
131 unsigned int mcsr, mcsrr0, mcsrr1, mcar;
132
133 /* Probing PCI using config cycles cause this exception
134 * when a device is not present. Catch it and return to
135 * the PCI exception handler.
136 */
137 if ((fixup = search_exception_table(regs->nip)) != 0) {
138 regs->nip = fixup;
139 return;
140 }
141
142 mcsrr0 = mfspr(SPRN_MCSRR0);
143 mcsrr1 = mfspr(SPRN_MCSRR1);
144 mcsr = mfspr(SPRN_MCSR);
145 mcar = mfspr(SPRN_MCAR);
146
147 machinecheck_count++;
148 machinecheck_error=1;
149
150 #if defined(CONFIG_CMD_KGDB)
151 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
152 return;
153 #endif
154
155 printf("Machine check in kernel mode.\n");
156 printf("Caused by (from mcsr): ");
157 printf("mcsr = 0x%08x\n", mcsr);
158 if (mcsr & 0x80000000)
159 printf("Machine check input pin\n");
160 if (mcsr & 0x40000000)
161 printf("Instruction cache parity error\n");
162 if (mcsr & 0x20000000)
163 printf("Data cache push parity error\n");
164 if (mcsr & 0x10000000)
165 printf("Data cache parity error\n");
166 if (mcsr & 0x00000080)
167 printf("Bus instruction address error\n");
168 if (mcsr & 0x00000040)
169 printf("Bus Read address error\n");
170 if (mcsr & 0x00000020)
171 printf("Bus Write address error\n");
172 if (mcsr & 0x00000010)
173 printf("Bus Instruction data bus error\n");
174 if (mcsr & 0x00000008)
175 printf("Bus Read data bus error\n");
176 if (mcsr & 0x00000004)
177 printf("Bus Write bus error\n");
178 if (mcsr & 0x00000002)
179 printf("Bus Instruction parity error\n");
180 if (mcsr & 0x00000001)
181 printf("Bus Read parity error\n");
182
183 show_regs(regs);
184 printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
185 mcsr, mcsrr0, mcsrr1, mcar);
186 print_backtrace((unsigned long *)regs->gpr[1]);
187 if (machinecheck_count > 10) {
188 panic("machine check count too high\n");
189 }
190
191 if (machinecheck_count > 1) {
192 regs->nip += 4; /* skip offending instruction */
193 printf("Skipping current instr, Returning to 0x%08lx\n",
194 regs->nip);
195 } else {
196 printf("Returning back to 0x%08lx\n",regs->nip);
197 }
198 }
199
AlignmentException(struct pt_regs * regs)200 void AlignmentException(struct pt_regs *regs)
201 {
202 #if defined(CONFIG_CMD_KGDB)
203 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
204 return;
205 #endif
206
207 show_regs(regs);
208 print_backtrace((unsigned long *)regs->gpr[1]);
209 panic("Alignment Exception");
210 }
211
ProgramCheckException(struct pt_regs * regs)212 void ProgramCheckException(struct pt_regs *regs)
213 {
214 long esr_val;
215
216 #if defined(CONFIG_CMD_KGDB)
217 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
218 return;
219 #endif
220
221 show_regs(regs);
222
223 esr_val = get_esr();
224 if( esr_val & ESR_PIL )
225 printf( "** Illegal Instruction **\n" );
226 else if( esr_val & ESR_PPR )
227 printf( "** Privileged Instruction **\n" );
228 else if( esr_val & ESR_PTR )
229 printf( "** Trap Instruction **\n" );
230
231 print_backtrace((unsigned long *)regs->gpr[1]);
232 panic("Program Check Exception");
233 }
234
PITException(struct pt_regs * regs)235 void PITException(struct pt_regs *regs)
236 {
237 /*
238 * Reset PIT interrupt
239 */
240 set_tsr(0x0c000000);
241
242 /*
243 * Call timer_interrupt routine in interrupts.c
244 */
245 timer_interrupt(NULL);
246 }
247
UnknownException(struct pt_regs * regs)248 void UnknownException(struct pt_regs *regs)
249 {
250 #if defined(CONFIG_CMD_KGDB)
251 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
252 return;
253 #endif
254
255 printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
256 regs->nip, regs->msr, regs->trap);
257 _exception(0, regs);
258 }
259
ExtIntException(struct pt_regs * regs)260 void ExtIntException(struct pt_regs *regs)
261 {
262 volatile ccsr_pic_t *pic = (void *)(CFG_SYS_MPC8xxx_PIC_ADDR);
263
264 uint vect;
265
266 #if defined(CONFIG_CMD_KGDB)
267 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
268 return;
269 #endif
270
271 printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
272 regs->nip, regs->msr, regs->trap);
273 vect = pic->iack0;
274 printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
275 show_regs(regs);
276 print_backtrace((unsigned long *)regs->gpr[1]);
277 }
278
DebugException(struct pt_regs * regs)279 void DebugException(struct pt_regs *regs)
280 {
281 printf("Debugger trap at @ %lx\n", regs->nip );
282 show_regs(regs);
283 }
284