Home
last modified time | relevance | path

Searched refs:FSYS1_MMC0_DIV_VAL (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos5.c20 #define FSYS1_MMC0_DIV_VAL 0x0701 macro
999 div_mmc |= FSYS1_MMC0_DIV_VAL; in emmc_boot_clk_div_set()

Completed in 3 milliseconds