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Searched refs:GPIO1_BASE_ADDR (Results 1 – 11 of 11) sorted by relevance

/arch/arm/include/asm/arch-imxrt/
A Dimx-regs.h12 #define GPIO1_BASE_ADDR 0x401B8000 macro
/arch/arm/include/asm/arch-imx8/
A Dimx-regs.h15 #define GPIO1_BASE_ADDR 0x5D080000 macro
/arch/arm/mach-imx/mx5/
A Dsoc.c38 if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) in get_cpu_rev()
A Dlowlevel_init.S382 ldr r0, =GPIO1_BASE_ADDR
/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h60 #define GPIO1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) macro
/arch/arm/include/asm/arch-mx27/
A Dimx-regs.h440 #define GPIO1_BASE_ADDR 0x10015000 macro
/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h18 #define GPIO1_BASE_ADDR 0x30200000 macro
/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h88 #define GPIO1_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF040) macro
/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch2.h78 #define GPIO1_BASE_ADDR (CONFIG_SYS_IMMR + 0x1300000) macro
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h182 #define GPIO1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x1C000) macro
/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h87 #define GPIO1_BASE_ADDR AIPS1_OFF_BASE_ADDR macro

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