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Searched refs:GPIO3_BASE_ADDR (Results 1 – 11 of 11) sorted by relevance

/arch/arm/include/asm/arch-imxrt/
A Dimx-regs.h14 #define GPIO3_BASE_ADDR 0x401C0000 macro
/arch/arm/include/asm/arch-imx8/
A Dimx-regs.h17 #define GPIO3_BASE_ADDR 0x5D0A0000 macro
/arch/arm/include/asm/arch-imx9/
A Dimx-regs.h25 #define GPIO3_BASE_ADDR 0x43820000UL macro
/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h62 #define GPIO3_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) macro
/arch/arm/include/asm/arch-mx27/
A Dimx-regs.h442 #define GPIO3_BASE_ADDR 0x10015200 macro
/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h20 #define GPIO3_BASE_ADDR 0x30220000 macro
/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h90 #define GPIO3_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF0C0) macro
/arch/arm/mach-imx/imx9/scmi/
A Dsoc.c553 gpio_reset(GPIO3_BASE_ADDR); in arch_cpu_init()
/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch2.h80 #define GPIO3_BASE_ADDR (CONFIG_SYS_IMMR + 0x1320000) macro
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h184 #define GPIO3_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x24000) macro
/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h89 #define GPIO3_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x20000) macro

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