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Searched refs:GPIO5_BASE_ADDR (Results 1 – 9 of 9) sorted by relevance

/arch/arm/include/asm/arch-imxrt/
A Dimx-regs.h16 #define GPIO5_BASE_ADDR 0x400C0000 macro
/arch/arm/include/asm/arch-imx8/
A Dimx-regs.h19 #define GPIO5_BASE_ADDR 0x5D0C0000 macro
/arch/arm/include/asm/arch-imx9/
A Dimx-regs.h27 #define GPIO5_BASE_ADDR 0x43850000UL macro
/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h81 #define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000) macro
/arch/arm/include/asm/arch-mx27/
A Dimx-regs.h444 #define GPIO5_BASE_ADDR 0x10015400 macro
/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h22 #define GPIO5_BASE_ADDR 0x30240000 macro
/arch/arm/mach-imx/imx9/scmi/
A Dsoc.c555 gpio_reset(GPIO5_BASE_ADDR); in arch_cpu_init()
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h186 #define GPIO5_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x2C000) macro
/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h91 #define GPIO5_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x40000) macro

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