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Searched refs:IC_CST (Results 1 – 3 of 3) sorted by relevance

/arch/powerpc/cpu/mpc8xx/
A Dcache.c15 return !!(mfspr(IC_CST) & IDC_ENABLED); in icache_status()
21 mtspr(IC_CST, IDC_INVALL); in icache_enable()
22 mtspr(IC_CST, IDC_ENABLE); in icache_enable()
28 mtspr(IC_CST, IDC_DISABLE); in icache_disable()
33 return !!(mfspr(IC_CST) & IDC_ENABLED); in dcache_status()
A Dstart.S90 mfspr r3, IC_CST /* Clear error bits */
94 mtspr IC_CST, r3
98 mtspr IC_CST, r3
105 mtspr IC_CST, r3
/arch/powerpc/include/asm/
A Dcache.h72 #define IC_CST 560 /* Instruction cache control/status */ macro
107 return mfspr(IC_CST); in rd_ic_cst()
112 mtspr(IC_CST, val); in wr_ic_cst()

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