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/arch/arm/include/asm/arch-rockchip/
A Dcpu_rk3288.h37 #define ROCKCHIP_SOC(id, ID) \ argument
42 return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
/arch/x86/include/asm/acpi/
A Dpcr.asl11 * Arg0 - PCR Port ID
21 * Arg0 - PCR Port ID
36 * Arg0 - PCR Port ID
60 * Arg0 - PCR Port ID
/arch/arm/mach-k3/include/mach/
A Dhardware.h75 #define K3_SOC_ID(id, ID) \ argument
80 return soc == JTAG_ID_PARTNO_##ID; \
/arch/arm/mach-tegra/
A Dpsci.S30 @ converts CPU ID into FLOW_CTRL_CPUn_CSR offset
52 bl psci_get_cpu_id @ CPU ID => r0
72 bl psci_get_cpu_id @ CPU ID => r0
/arch/x86/include/asm/acpi/cros_ec/
A Dec.asl40 PATI, 8, // Programmable Auxiliary Trip Sensor ID
382 * Arg0 = Temp Sensor ID
391 /* Set sensor ID */
409 * Arg0 = Temp Sensor ID
418 /* Set sensor ID */
435 * Arg0 = Temp Sensor ID
462 /* Read sensor ID for event */
465 /* When sensor ID returns 0xFF then no more events */
472 /* Keep reaading sensor ID for event */
521 * Arg0 = USB port ID
[all …]
/arch/sandbox/dts/
A Dcedit.dtsi30 * has both string and ID. The string is ignored
31 * if the ID is present and points to a string
/arch/arm/dts/
A Domap3-cpu-thermal.dtsi15 /* sensor ID */
A Ddra7-dspeve-thermal.dtsi14 /* sensor ID */
A Ddra7-iva-thermal.dtsi14 /* sensor ID */
A Domap5-core-thermal.dtsi15 /* sensor ID */
A Domap5-gpu-thermal.dtsi15 /* sensor ID */
A Domap4-cpu-thermal.dtsi15 /* sensor ID */
A Dsun50i-h6-orangepi.dtsi256 * have a controllable VBUS even though they do have an ID pin.
A Dsun8i-h2-plus-bananapi-m2-zero.dts253 "VCC-IO-EN", "USB0-ID", "WL-PWR-EN",
A Dimx6qdl-cubox-i.dtsi196 * The Cubox-i pulls ID low, but as it's pointless
A Dsun50i-h6-orangepi-3.dts329 * does have an ID pin. Using it as anything but a USB host is
/arch/arm/cpu/armv7/
A Dpsci.S144 1: ldr r5, [r4] @ Load PSCI function ID
161 @ Requires dense and single-cluster CPU ID space
274 @ This expects CPU ID in r0 and returns stack top in r0
289 bl psci_get_cpu_id @ CPU ID => r0
313 bl psci_get_cpu_id @ CPU ID => r0
316 bl psci_get_cpu_id @ CPU ID => r0
/arch/arm/mach-aspeed/ast2600/
A Dlowlevel_init.S120 mrc p15, 0, r0, c0, c0, 5 @; Read CPU ID register
121 ands r0, #0xff @; Mask off, leaving the CPU ID field
/arch/arm/mach-omap2/omap3/
A DKconfig138 bool "Support OMAP3-specific ID and MFR function"
142 ID and MFR of the first attached NAND chip, if present.
A Dlowlevel_init.S28 MOV r12, r0 @ Copy the Secure Service ID in R12
30 MOV r1, #0 @ Process ID - 0
/arch/arm/mach-omap2/
A Dlowlevel_init.S69 mov r12, #0x00 @ Secure Service ID in R12
/arch/arm/cpu/armv7/ls102xa/
A Dpsci.S84 @ r1: input target CPU ID in MPIDR format, original value in r1 may be dropped
85 @ r4: output validated CPU ID if ARM_PSCI_RET_SUCCESS returns, meaningless for
/arch/x86/include/asm/acpi/dptf/
A Ddptf.asl40 * Arg1: Integer containing Revision ID of buffer format
/arch/arm/mach-omap2/omap5/
A Dsec_entry_cpu1.S42 mov r12, #0x00 @ Secure Service ID in R12
/arch/x86/dts/
A Dchromebook_link.dts547 /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x144dc0c2 */
583 /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */

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