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Searched refs:IDC_ENABLE (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/cpu/mpc8xx/
A Dcache.c22 mtspr(IC_CST, IDC_ENABLE); in icache_enable()
40 mtspr(DC_CST, IDC_ENABLE); in dcache_enable()
A Dcpu.c72 wr_ic_cst(IDC_ENABLE); in checkicache()
110 wr_dc_cst(IDC_ENABLE); in checkdcache()
A Dstart.S104 lis r3, IDC_ENABLE@h /* Enable instruction cache */
/arch/powerpc/include/asm/
A Dcache.h81 #define IDC_ENABLE 0x02000000 /* Cache enable */ macro

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