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Searched refs:IRAM_BASE_ADDR (Results 1 – 8 of 8) sorted by relevance

/arch/arm/mach-imx/
A Dcache.c63 mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, in enable_caches()
/arch/arm/lib/
A Dvectors.S174 #ifdef IRAM_BASE_ADDR
175 .word IRAM_BASE_ADDR + 0x20
/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h12 #define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ macro
31 #define IRAM_BASE_ADDR 0xF8000000 macro
/arch/arm/cpu/armv7/vf610/
A Dgeneric.c382 mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); in enable_caches()
/arch/arm/include/asm/arch-mx7ulp/
A Dimx-regs.h98 #define IRAM_BASE_ADDR OCRAM_0_BASE macro
959 #define IRAM_BASE_ADDR OCRAM_0_BASE macro
/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h11 #define IRAM_BASE_ADDR 0x3F000000 /* internal ram */ macro
/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h67 #define IRAM_BASE_ADDR 0x00900000 macro
/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h43 #define IRAM_BASE_ADDR OCRAM_ARB_BASE_ADDR macro

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