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Searched refs:L1CSR0_DCE (Results 1 – 3 of 3) sorted by relevance

/arch/powerpc/cpu/mpc85xx/
A Drelease.S128 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
129 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
134 andi. r1,r3,L1CSR0_DCE@l
A Dstart.S857 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
858 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
863 andi. r1,r3,L1CSR0_DCE@l
1458 ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
1459 oris r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h
1470 ori r4,r4,L1CSR0_DCE
1479 andi. r3,r3,L1CSR0_DCE
/arch/powerpc/include/asm/
A Dprocessor.h486 #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ macro

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