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Searched refs:MCHBAR (Results 1 – 6 of 6) sorted by relevance

/arch/x86/include/asm/arch-apollolake/
A Dsystemagent.h15 #define MCHBAR 0x48 macro
/arch/x86/include/asm/arch-ivybridge/
A Dsandybridge.h51 #define MCHBAR 0x48 macro
/arch/x86/cpu/ivybridge/
A Dnorthbridge.c163 dm_pci_write_config32(dev, MCHBAR, MCH_BASE_ADDRESS | 1); in sandybridge_setup_northbridge_bars()
164 dm_pci_write_config32(dev, MCHBAR + 4, (0LL + MCH_BASE_ADDRESS) >> 32); in sandybridge_setup_northbridge_bars()
/arch/x86/include/asm/arch-broadwell/
A Dpch.h36 #define MCHBAR 0x48 macro
/arch/x86/cpu/apollolake/
A Dhostbridge.c165 pci_x86_read_config(plat->bdf, MCHBAR, &base, PCI_SIZE_32); in apl_hostbridge_early_init()
167 pci_x86_write_config(plat->bdf, MCHBAR, base | 1, PCI_SIZE_32); in apl_hostbridge_early_init()
/arch/x86/cpu/broadwell/
A Dnorthbridge.c119 dm_pci_write_config32(dev, MCHBAR, MCH_BASE_ADDRESS | 1); in broadwell_northbridge_early_init()

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