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Searched refs:MIPS_CPC_BASE (Results 1 – 3 of 3) sorted by relevance

/arch/mips/mach-mtmips/mt7621/spl/
A Dlaunch.c47 void __iomem *cpcbase = (void __iomem *)KSEG1ADDR(MIPS_CPC_BASE); in bootup_secondary_core()
A Dcps.c149 writel(MIPS_CPC_BASE | GCR_CPC_EN, cm_base + GCR_CPC_BASE); in mt7621_cps_init()
/arch/mips/mach-mtmips/mt7621/
A Dmt7621.h46 #define MIPS_CPC_BASE 0x1fbf0000 macro

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