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Searched refs:MMU_SECTION_SHIFT (Results 1 – 6 of 6) sorted by relevance

/arch/arm/lib/
A Dcache-cp15.c48 set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); in set_section_dcache()
69 >> (MMU_SECTION_SHIFT - 1); in mmu_set_region_dcache_behaviour_phys()
70 start = start >> MMU_SECTION_SHIFT; in mmu_set_region_dcache_behaviour_phys()
105 for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
106 i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + in dram_bank_mmu_setup()
107 (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT); in dram_bank_mmu_setup()
120 for (i = 0; i < ((4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT); i++) in mmu_setup()
/arch/arm/mach-omap2/
A Domap-cache.c59 u32 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
60 u32 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
/arch/arm/mach-stm32mp/stm32mp1/
A Dcpu.c80 for (i = start >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
81 i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT); in dram_bank_mmu_setup()
83 addr = i << MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
86 (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) || in dram_bank_mmu_setup()
/arch/arm/mach-socfpga/
A Dmisc_arria10.c259 CFG_SYS_INIT_RAM_ADDR >> MMU_SECTION_SHIFT, in dram_bank_mmu_setup()
270 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
271 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT; in dram_bank_mmu_setup()
/arch/arm/include/asm/
A Dsystem.h143 #define MMU_SECTION_SHIFT 21 macro
144 #define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
595 MMU_SECTION_SHIFT = 21, /* 2MB */ enumerator
597 MMU_SECTION_SHIFT = 20, /* 1MB */
599 MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
/arch/mips/include/asm/
A Dsystem.h287 #define MMU_SECTION_SHIFT 20 macro
288 #define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)

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