Home
last modified time | relevance | path

Searched refs:MPLL_CON1_VAL (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-exynos/
A Dclock_init_exynos4.c85 writel(MPLL_CON1_VAL, &clk->mpll_con1); in system_clock_init()
A Dexynos5_setup.h446 #define MPLL_CON1_VAL (0x00203800) macro
710 #define MPLL_CON1_VAL (0x0020F300) macro
A Dexynos4_setup.h350 #define MPLL_CON1_VAL ((MPLL_AFC_ENB << 31) | (MPLL_AFC << 0)) macro
A Dclock_init_exynos5.c625 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5250_system_clock_init()
846 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5420_system_clock_init()

Completed in 15 milliseconds