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/arch/arm/dts/
A Dtegra30-colibri.dts76 /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
82 /* EHCI instance 1: USB2_DP/N -> AX88772B */
89 /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
A Dtegra20-colibri.dts86 /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
102 /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
A Dtegra30-apalis.dts269 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
277 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
284 /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
A Dtegra124-venice2.dts90 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
95 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
A Dtegra124-cei-tk1-som.dts316 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
321 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
402 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
414 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
A Dtegra124-jetson-tk1.dts321 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
326 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
407 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
419 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
A Dtegra114-dalmore.dts75 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
A Dtegra124-nyan.dtsi25 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
418 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
439 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
623 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
635 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
A Dimx53-usbarmory.dts79 * Not every i.MX53 P/N supports clock > 800MHz.
80 * As USB armory does not mount a specific P/N set a safe clock upper limit.
A Dtegra30-asus-tf700t.dts122 reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
A Dtegra20-lg-star.dts452 dc-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>;
454 cs-gpios = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
A Dimx8mp-dhcom-drc02.dts95 "DHCOM-O", "DHCOM-N", "", "SOM-HW1", "", "", "", "",
A Dsun8i-h2-plus-bananapi-m2-zero.dts244 "BT-RST-N", "AP-WAKE-BT", "", "",
A Dtegra124-apalis.dts107 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
1998 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
2009 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
2019 /* EHCI instance 2: USB3_DP/N -> USBH4_DP/N */
A Dam57xx-idk-common.dtsi199 /* 5718 - N.C. test point */
A Dtegra20-seaboard.dts73 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
460 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
A Dtegra20-tamonten.dtsi17 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
A Dtegra20-paz00.dts48 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
/arch/arm/mach-keystone/include/mach/
A Dclock_defs.h70 #define pll0div_read(N) ((pllctl_reg_read(CORE_PLL, div##N) & 0xff) + 1) argument
/arch/arm/mach-sunxi/
A Dclock_sun4i.c79 #define PLL1_CFG(N, K, M, P) ( 1 << CCM_PLL1_CFG_ENABLE_SHIFT | \ argument
86 (N)<< CCM_PLL1_CFG_FACTOR_N_SHIFT | \
/arch/x86/dts/
A Dchromebook_link.dts552 * Speaker at Int N/A
556 /* Pin Complex (NID 0x0C) N/C */
559 /* Pin Complex (NID 0x0D) N/C */
562 /* Pin Complex (NID 0x0E) N/C */
565 /* Pin Complex (NID 0x0F) N/C */
/arch/arm/mach-omap2/
A Dclocks-common.c215 u32 temp, M, N; in do_setup_dpll() local
230 N = (temp & CM_CLKSEL_DPLL_N_MASK) >> CM_CLKSEL_DPLL_N_SHIFT; in do_setup_dpll()
231 if ((M != (params->m)) || (N != (params->n))) { in do_setup_dpll()
235 M, N); in do_setup_dpll()
/arch/x86/include/asm/acpi/
A Ddebug.asl28 /* DINI - Initialize the serial port to 115200 8-N-1 */
/arch/arm/cpu/armv8/
A DKconfig14 Say N here if you are running out of code space in the image
/arch/riscv/
A DKconfig397 you say N here, U-Boot will run on single and multiprocessor
408 If you say N here, U-Boot SPL will run on single and multiprocessor

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