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Searched refs:NUM_CHANNELS (Results 1 – 3 of 3) sorted by relevance

/arch/x86/include/asm/arch-quark/
A Dmrc.h18 #define NUM_CHANNELS 1 /* number of channels */ macro
77 uint32_t rcvn[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
78 uint32_t rdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
79 uint32_t wdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
80 uint32_t wdq[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
81 uint32_t vref[NUM_CHANNELS][NUM_BYTE_LANES];
82 uint32_t wctl[NUM_CHANNELS][NUM_RANKS];
83 uint32_t wcmd[NUM_CHANNELS];
145 uint32_t channel_size[NUM_CHANNELS];
146 uint32_t column_bits[NUM_CHANNELS];
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/arch/x86/cpu/quark/
A Dsmc.c279 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
303 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
934 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
970 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
1006 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
1058 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
1356 for (ch = 0; ch < NUM_CHANNELS; ch++) { in restore_timings()
1384 for (ch = 0; ch < NUM_CHANNELS; ch++) { in default_timings()
1445 for (ch = 0; ch < NUM_CHANNELS; ch++) { in rcvn_cal()
1591 for (ch = 0; ch < NUM_CHANNELS; ch++) { in wr_level()
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A Dmrc_util.c1359 for (channel = 0; channel < NUM_CHANNELS; channel++) { in clear_pointers()
1456 for (channel = 0; channel < NUM_CHANNELS; channel++) { in print_timings()

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