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Searched refs:OUT_CLK_DIVISOR_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h319 #define OUT_CLK_DIVISOR_SHIFT 0 macro
320 #define OUT_CLK_DIVISOR_MASK (0xffff << OUT_CLK_DIVISOR_SHIFT)
/arch/arm/mach-tegra/
A Dclock.c184 value |= divisor << OUT_CLK_DIVISOR_SHIFT; in clock_ll_set_source_divisor()
323 int div = (readl(reg) & OUT_CLK_DIVISOR_MASK) >> OUT_CLK_DIVISOR_SHIFT; in clock_get_periph_rate()
428 divider << OUT_CLK_DIVISOR_SHIFT); in adjust_periph_pll()

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