Home
last modified time | relevance | path

Searched refs:PHY_CON10_CTRL_OFFSETR3 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/include/mach/
A Ddmc.h472 #define PHY_CON10_CTRL_OFFSETR3 (1 << 24) macro
/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c292 setbits_le32(&phy_ctrl->phy_con10, PHY_CON10_CTRL_OFFSETR3); in ddr_phy_set_do_resync()
293 clrbits_le32(&phy_ctrl->phy_con10, PHY_CON10_CTRL_OFFSETR3); in ddr_phy_set_do_resync()

Completed in 8 milliseconds