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Searched refs:PLLP_OUT1_RSTN_DIS (Results 1 – 3 of 3) sorted by relevance

/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h278 #define PLLP_OUT1_RSTN_DIS (1 << 0) macro
/arch/arm/mach-tegra/
A Dclock.c911 | PLLP_OUT1_OVR | PLLP_OUT1_CLKEN | PLLP_OUT1_RSTN_DIS; in tegra30_set_up_pllp()
/arch/arm/mach-tegra/tegra210/
A Dclock.c978 | PLLP_OUT1_OVR | PLLP_OUT1_CLKEN | PLLP_OUT1_RSTN_DIS; in tegra210_setup_pllp()

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