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Searched refs:PLL_ENABLE_MASK (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-tegra/
A Dcpu.c222 if (readl(&pll->pll_base) & PLL_ENABLE_MASK) { in pllx_set_rate()
264 reg |= PLL_ENABLE_MASK; in pllx_set_rate()
A Dclock.c665 base_reg |= PLL_ENABLE_MASK; in clock_set_rate()
693 base_reg |= PLL_ENABLE_MASK; in clock_set_rate()
/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h243 #define PLL_ENABLE_MASK (1U << PLL_ENABLE_SHIFT) macro

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